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Deep trace memory system for a protocol analyzer

  • US 20010016925A1
  • Filed: 05/03/2001
  • Published: 08/23/2001
  • Est. Priority Date: 11/17/1997
  • Status: Active Grant
First Claim
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1. A protocol analyzer having a deep trace memory system that stores traces captured from a communication interface for presentation by a host processor, the protocol analyzer comprising:

  • a portable chassis physically separate from the host processor that includes;

    a host port that provides a connection to the host processor;

    an interface port that provides a connection to the communication interface;

    a trace buffer memory;

    logic circuitry that controls selective write operations of traces from the interface port to the trace buffer and selective read operations of traces from the trace buffer to the host port in response to parameters directed by the host processor; and

    a hardware search engine that locates specified data patterns as directed by the host processor within the trace buffer.

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