Integrated circuit inductors

• US 20010016976A1
• Filed: 05/07/2001
• Published: 08/30/2001
• Est. Priority Date: 07/09/1999
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Ahn, Kie Y., Forbes, Leonard
• Granted Patent: US 6,762,478 B2
• Time in Patent Office: Days
• US Class Current: 29/604
• CPC Class Codes: H01F 17/0033 with the coil helically wound around a magnetic core
• CPC Class Codes: H01F 27/2804 Printed windings
• CPC Class Codes: H01F 37/00 Fixed inductances not covered by group H01F17/00
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: Y10S 257/924 with passive device, e.g. capacitor, or battery, as integral part of housing or housing element, e.g. cap
• CPC Class Codes: Y10T 29/4902 Electromagnet, transformer or inductor
• CPC Class Codes: Y10T 29/49037 Using reference point/surface to facilitate measuring
• CPC Class Codes: Y10T 29/49069 Data storage inductor or core
• CPC Class Codes: Y10T 29/49071 by winding or coiling
• CPC Class Codes: Y10T 29/49073 by assembling coil and core
• CPC Class Codes: Y10T 29/49075 including permanent magnet or core

Abstract

The invention relates to an inductor comprising a plurality of interconnected conductive segments interwoven with a substrate. The inductance of the inductor is increased through the use of coatings and films of ferromagnetic materials such as magnetic metals, alloys, and oxides. The inductor is compatible with integrated circuit manufacturing techniques and eliminates the need in many systems and circuits for large off chip inductors. A sense and measurement coil, which is fabricated on the same substrate as the inductor, provides the capability to measure the magnetic field or flux produced by the inductor. This on chip measurement capability supplies information that permits circuit engineers to design and fabricate on chip inductors to very tight tolerances.

Claims

1. An inductor comprising:

a substrate;

a ferromagnetic layer in contact with the substrate; and

a highly conductive path interwoven with the substrate.

2. The inductor of

claim 1

wherein the substrate is a semiconductor.

3. The inductor of

claim 2

, further comprising:

an insulating layer and a magnetic material layer formed on the substrate between the highly conductive path and the substrate.

4. The inductor of

claim 3

, wherein the insulating layer is a dielectric.

5. An inductor comprising:

a substrate; and

a highly conductive path having an inductance value, and the highly conductive path comprising a plurality of interconnected conductive segments interwoven with the substrate, wherein each of the plurality of interconnected conductive segments has a mid-segment cross section profile selected from the group consisting of circular and rectangular.

6. The inductor of

claim 5

, wherein each of the plurality of interconnected conductive segments is fabricated from a different metal.

7. The inductor of

claim 5

, wherein each of the plurality of interconnected conductive segments is fabricated from one of two different metals.

8. An inductor comprising:

a semiconductor substrate having a crystalline structure and a plurality of perforations; and

a highly conductive metal path woven through the plurality of perforations of the semiconductor substrate, and at least partially diffused into the crystalline structure.

9. The inductor of

claim 8

, wherein the semiconductor is germanium.

10. The inductor of

claim 9

, wherein the highly conductive metal path is fabricated from copper.

11. The inductor of

claim 8

, further comprising:

an insulating material partially filling each of the plurality of perforations.

12. The inductor of

claim 11

, wherein the insulating material is polyimide.

13. An inductor comprising:

a substrate; and

a plurality of copper segments interconnected with and alternating with a plurality of conductive segments to form a highly conductive coil.

14. An inductor comprising:

a substrate;

an inductive structure having an inductance of at least 0.1 nanohenrys partially embedded in the substrate.

15. The inductor of

claim 14

, wherein the inductive structure is a coil.

16. The inductor of

claim 14

, further comprising:

a coating covering the inductive structure.

17. The inductor of

claim 16

, wherein the coating is an insulator and capable of protecting the inductive structure from damage.

18. An inductor comprising:

a perforated substrate; and

a triangular coil having an inductance of at least 0.3 nanohenrys interlaced with the perforated substrate.

19. The inductor of

claim 18

, wherein the perforated substrate is silicon carbide.

20. The inductor of

claim 18

, further comprising:

at least one test lead attached to the coil.

21. The inductor of

claim 20

, wherein the pair of test lead is capable of being decoupled from the coil using a laser.

22. An inductor comprising:

a semiconductor substrate;

a conductive path through the semiconductor substrate and operable for creating a reinforcing magnetic flux within the semiconductor substrate.

23. The inductor of claims 22, wherein the semiconductor substrate is silicon.

24. The inductor of

claim 22

, further comprising:

a test coil embedded in the substrate for measuring the reinforcing magnetic flux.

25. The inductor of

claim 24

, wherein the test coil is fabricated from gold.

26. The inductor of

claim 25

, wherein the test coil is initially fabricated as part of the conductive path and then decoupled from the conductive path.

27. An inductor comprising:

a substrate;

a pair of substantially parallel rows of conductive columns providing a conductive path through the substrate; and

a plurality of conductive segments interconnecting the pair of substantially parallel rows of conductive columns to form a coil.

28. The inductor of

claim 27

, wherein the substrate has a plurality of substantially planarized surfaces.

29. The inductor of

claim 27

, wherein the columns are substantially perpendicular to at least two of the substantially planarized surfaces.

30. The inductor of

claim 29

, wherein a test coil is fabricated on one of the substantially planarized surfaces.

31. The inductor of

claim 30

, wherein the test coil is a spiral coil.

32. An inductor comprising:

a perforated substrate; and

a conductive material interwoven with the perforated substrate and at least partially diffused into the perforated substrate.

33. The inductor of

claim 32

, wherein the conductive material is gold.

34. The inductor of

claim 32

, wherein the perforated substrate comprises a plurality of perforations having a circular shape.

35. An inductor comprising:

a substrate having a plurality of substantially parallel holes, a plurality of substantially parallel surfaces, and a second plurality of substantially parallel surfaces approximately perpendicular to the plurality of substantially parallel surfaces;

a coil intersecting the plurality of substantially parallel surfaces and filling the plurality of substantially parallel holes; and

at least two leads operable for coupling to the coil from at least one of the second plurality of substantially parallel surfaces.

36. An inductor comprising:

a substrate having a plurality of holes and a plurality of surfaces;

a conductive material having a conductivity of at least copper and filling at least three of the plurality of holes to form a plurality of conductive segments; and

a plurality of conductive interconnects formed on at least one of the plurality of surfaces and coupling to the plurality of conductive segments to form a continuous conductive coil.

37. An inductor comprising:

a substrate having a plurality of perforations and a plurality of layers; and

a conductive material interwoven with the substrate through the plurality of perforations and operable for producing a reinforcing magnetic field in the plurality of layers.

38. The inductor of

claim 37

, wherein at least one of the plurality of layers is a magnetic film.

39. The inductor of

claim 38

, wherein the magnetic film is a magnetic oxide.

40. The inductor of

claim 37

, wherein at least one of the plurality of layers is fabricated from nickel and iron.

41. An inductor comprising:

a coil having a core area; and

a partially coated substrate filling the core area.

42. An inductor comprising:

a coil operable for creating a magnetic flux; and

a substrate having a surface coating coupled to the magnetic flux.

43. The inductor of

claim 42

, wherein the surface coating is a magnetic material.

44. The inductor of

claim 43

, wherein the coil comprises a plurality of interconnected metal segments fabricated from a material selected form the group consisting of gold and copper.

45. An inductor comprising:

a multilayer substrate; and

a coil interwoven with the multilayer substrate.

46. An inductor comprising:

a substrate having a plurality of surfaces where at least one of the plurality of surfaces is planarized and has a coating; and

a coil operable for generating a magnetic field that is substantially parallel to the planarized surface and that penetrates the coating, the coil is partially embedded in the substrate.

47. An integrated circuit comprising:

a perforated substrate having a circuit formed on the perforated substrate and having a plurality of surfaces where at least one of the plurality of surfaces has a coating; and

a coil located partially above the coating and the coil operably coupled to the circuit.

48. The integrated circuit of

claim 47

, wherein the coil has a length and less than about twenty percent of the length of the coil is located above the coating.

49. An integrated circuit comprising:

a coated substrate having a circuit formed on the coated substrate and having a plurality of substantially parallel perforations; and

a coil routed through the plurality of substantially parallel perforations, and the coil operably coupled to the circuit.

50. An integrated circuit comprising:

a partially magnetic substrate having a circuit formed thereon; and

a conductive material interwoven with the partially magnetic substrate and operable for generating a magnetic field in the partially magnetic substrate, and the conductive material operably coupled to the circuit.

51. An integrated circuit comprising:

a substrate having a coating;

a circuit formed on the substrate; and

a conductive path operable for creating a magnetic field in the coating, and coupled to the circuit.

52. A memory system comprising:

a substrate having a plurality of memory cells and a coating; and

a conductive path interwoven with the substrate and operable for creating a magnetic field in the coating but not above the coating.

53. A memory system comprising:

a coated substrate having a number of memory cells; and

an inductive structure having an inductance of at least 0.5 nanohenrys piercing the coated substrate and interlaced with the coated substrate and interconnected with at least one of the number of memory cells.

54. A memory system comprising:

a substrate having a plurality of holes and a plurality of memory circuits;

a magnetic film formed on the substrate; and

a conductive path interwoven with the substrate and the magnetic film by routing the conductive path through the plurality of holes.

55. A computer system comprising:

a processor;

an inductive element comprising;

a substrate having a pair of rows of a plurality of substantially parallel perforations;

a magnetic film on the substrate; and

a conductive path interlaced with the substrate through the plurality of substantially parallel perforations; and

an electronic device coupled to the inductive element and the processor.

56. A computer system comprising:

a processor;

an inductor comprising;

a substrate;

a magnetic film on the substrate; and

a conductive path operable for creating a reinforcing magnetic field within the magnetic film and within the substrate; and

an electronic circuit operably coupled to the processor and the inductor.

57. An computer system comprising:

a processor;

an inductor comprising;

a substrate;

a magnetic film on the substrate; and

a conductive path interwoven with the substrate and operable for creating a magnetic field in the magnetic film; and

a power supply circuit coupled to the inductor and the processor.

58. A method comprising:

boring a plurality of holes in a substratum; and

fabricating a conductive path linking the plurality of holes.

59. The method of

claim 58

, wherein boring a plurality of hoes in the substratum comprises:

positioning a drill on the substratum; and

drilling a hole in the substratum.

60. The method of

claim 58

, wherein boring a plurality of hoes in the substratum comprises:

aiming a laster at the substratum; and

burning a hole in the substratum.

61. A method comprising;

boring a number of substantially parallel holes in a substrate having a coating;

depositing a conductive path linking the number of holes and operable for inducing a magnetic flux in the coating.

62. The method of

claim 61

, wherein depositing a conductive path comprises:

filling the holes with a conductive material; and

connecting the holes with a conductive material.

63. A method comprising:

drilling a plurality of holes in a substrate;

filling the plurality of holes with a conductive material to form a plurality of conductive segments; and

interconnecting the plurality of conductive segments to form a coil.

64. A method comprising:

boring a plurality for substantially parallel perforations in a substrate having a pair of substantially parallel surfaces;

plugging the plurality of substantially parallel perforations with a highly conductive material to form a highly conductive segment; and

interconnecting the plurality of highly conductive segments to form a conductive path operable for producing a reinforcing magnetic field.

65. A method comprising:

drilling a plurality of substantially parallel holes in a substrate having a plurality of substantially parallel surfaces;

coating at least one of the substantially parallel surfaces with a magnetic material;

filling the plurality of substantially parallel holes with a conductor to form a conductive segment; and

interconnecting the plurality of conductive segments to form a coil operable for producing a magnetic field in the coating.

66. A method comprising:

piercing a substrate having a plurality of substantially parallel surfaces to form a plurality of substantially parallel perforations;

coating at least one of the substantially parallel surfaces with an insulating film;

coating the insulating film with a magnetic film;

coating the magnetic film with an insulating material;

depositing in at least two of the plurality of substantially parallel perforations a conductor to form a plurality of conductive segments; and

coupling the plurality of conductive segments with a conductive material to form a loop.