Display device and method for fabricating the same
First Claim
Patent Images
1. A display device, comprising:
- a gate wiring; and
a source wiring that is formed on the same surface by the same conductive film as said gate wiring, wherein said gate wiring overpasses said source wiring via a connecting wiring, and wherein said connecting wiring is formed on the same surface by the same conductive film as a drain wiring of a current-controlling TFT.
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Accused Products
Abstract
An inexpensive display device, as well as an electrical apparatus employing the same, can be provided. In the display device in which a pixel section and a driver circuit are included on one and the same insulating surface, the driver circuit includes a decoder 100 and a buffer section 101. The decoder 100 includes a plurality of NAND circuits each including p-channel TFTs 104 to 106 connected to each other in parallel and other p-channel TFTs 107 to 109 connected to each other in series. The buffer section 101 includes a plurality of buffers each including three p-channel TFTs 114 to 116.
166 Citations
28 Claims
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1. A display device, comprising:
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a gate wiring; and
a source wiring that is formed on the same surface by the same conductive film as said gate wiring, wherein said gate wiring overpasses said source wiring via a connecting wiring, and wherein said connecting wiring is formed on the same surface by the same conductive film as a drain wiring of a current-controlling TFT. - View Dependent Claims (17, 18, 19, 20, 21, 22)
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2. A display device, comprising:
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a gate wiring; and
a source wiring that is formed on the same surface by the same conductive film as said gate wiring, wherein said source wiring overpasses said gate wiring via a connecting wiring, and wherein said connecting wiring is formed on the same surface by the same conductive film as a drain wiring of a current-controlling TFT.
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3. A display device, comprising:
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a gate wiring; and
a source wiring and a current supply line that are formed on the same surface by the same conductive film as said gate wiring, wherein said gate wiring overpasses said source wiring and said current supply line via a connecting wiring, and wherein said connecting wiring is formed on the same surface by the same conductive film as a drain wiring of a current-controlling TFT.
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4. A display device, comprising:
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a gate wiring; and
a source wiring and a current supply line that are formed on the same surface by the same conductive film as said gate wiring, wherein said source wiring overpasses said source wiring and said current supply line via a connecting wiring, and wherein said connecting wiring is formed on the same surface by the same conductive film as a drain wiring of a current-controlling TFT.
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5. A display device, comprising:
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a pixel section and a driver circuit that are formed on an insulating surface;
wherein said driver circuit comprises a decoder including a plurality of NAND circuits each formed of a TFT of one conductivity type. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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6. A display device, comprising:
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a pixel section and a driver circuit that are formed on an insulating surface;
wherein said driver circuit comprises a decoder including a plurality of NAND circuits each formed of a TFT of one conductivity type, and each of said NAND circuits comprises n TFTs of said one conductivity type connected to each other in series and n TFTs of said one conductivity type connected to each other in parallel.
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7. A display device, comprising:
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a pixel section and a driver circuit that are formed on an insulating surface;
wherein said driver circuit comprises a buffer formed of TFTs of one conductivity type, and said buffer comprising;
a first TFT of said one conductivity type; and
a second TFT of said one conductivity type that is connected to said first TFT in series, and utilizes a drain of said first TFT as its gate.
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8. A display device, comprising:
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a pixel section and a driver circuit that are formed on an insulating surface;
wherein said driver circuit comprises;
a decoder including a plurality of NAND circuits each formed of a TFT of one conductivity type; and
a buffer formed of TFTs of said one conductivity type, andsaid buffer comprising;
a first TFT of said one conductivity type; and
a second TFT of said one conductivity type that is connected to said first TFT in series and utilizes a drain of said first TFT as its gate.
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9. A display device, comprising:
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a pixel section and a driver circuit that are formed on an insulating surface;
wherein said driver circuit comprises;
a decoder including a plurality of NAND circuits each formed of a TFT of one conductivity type; and
a buffer formed of TFTs of said one conductivity type,each of said NAND circuits comprises n TFTs of said one conductivity type connected to each other in series and n TFTs of said one conductivity type connected to each other in parallel, and said buffer comprising;
a first TFT of said one conductivity type; and
a second TFT of said one conductivity type that is connected to said first TFT in series and utilizes a drain of said first TFT as its gate.
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23. A method for fabricating a display device, comprising the steps of:
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forming a semiconductor layer on an insulating surface;
forming a gate insulating film on said semiconductor layer;
forming a source wiring, a gate wiring and a current supply line on said gate insulating film;
forming a p-type semiconductor region in said semiconductor layer;
forming an interlayer insulating layer over said source wiring, said gate wiring and said current supply line;
forming contact holes respectively reaching said source wiring, said p-type semiconductor region, and said current supply line; and
forming a connecting wiring providing electrical connection either between said source wiring and said p-type semiconductor region or between said current supply line and said p-type semiconductor region. - View Dependent Claims (25, 26, 27, 28)
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24. A method for fabricating a display device, comprising the steps of:
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forming a semiconductor layer on an insulating surface;
forming a gate insulating film on said semiconductor layer;
forming a source wiring, a gate wiring and a current supply line on said gate insulating film;
forming a p-type semiconductor region in said semiconductor layer;
forming an interlayer insulating layer over said source wiring, said gate wiring and said current supply line;
forming contact holes respectively reaching said source wiring, said p-type semiconductor region, and said current supply line; and
forming a connecting wiring that overpasses said source wiring and connects a plurality of gate wirings to each other.
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Specification