Method and apparatus for protection of batteries

• US 20010021092A1
• Filed: 12/29/2000
• Published: 09/13/2001
• Est. Priority Date: 12/31/1999
• Status: Active Grant

• Current Assignee: Nokia Technologies Oy (Nokia Corporation)
• Original Assignee: Nokia Mobile Phones UK Limited (Nokia Corporation)
• Inventors: Astala, Jari
• Granted Patent: US 6,804,100 B2
• Time in Patent Office: Days
• US Class Current: 361/90
• CPC Class Codes: H02J 7/00304 Overcurrent protection
• CPC Class Codes: H02J 7/00308 Overvoltage protection

Abstract

The protection circuit (30) comprises at least one switch (FET1, FET2) comprising at least one control means (G1, G2) for adjusting the conductivity of said at least one switch (FET1, FET2). The conductivity is arranged to be adjustable by means of an electrical control conducted to the control means (G1, G2). The protection circuit (30) comprises means (22, 25, 26) for forming the electrical control, means (27, 28) for measuring at least one physical quantity affecting at least one switch (FET1, FET2), means (10) for providing information about the dependence of the conductivity properties of said at least one switch (FET1, FET2) on said at least one physical quantity, means (29) for determining the conductivity of said at least one switch (FET1, FET2) on the basis of said at least one physical quantity and the conductivity properties of said at least one switch (FET1, FET2) and means (29, 27) for determining the current (I_TOT) conducted through said at least one switch (FET1, FET2) at least partly on the basis of said conductivity. Thus, said electrical control is arranged to be formed at least partly on the basis of the determined current.

Claims

1. A protection circuit (30) which comprises at least one switch (FET1, FET2) comprising at least one control means (G1, G2) for adjusting the conductivity of at least one switch (FET1, FET2), the conductivity being arranged to be adjustable by means of an electrical control applied to the control means (G1, G2), characterized in that the protection circuit (30) comprises means (22, 25, 26) for forming the electrical control, means (27, 28) for measuring at least one physical quantity affecting said at least one switch (FET1, FET2), means (10) for providing information about the dependence of the conductivity properties of said at least one switch (FET1, FET2) on said at least one physical quantity, means (29) for determining the conductivity of said at least one switch (FET1, FET2) on the basis of said at least one physical quantity and the conductivity properties of said at least one switch (FET1, FET2) and means (29, 27) for determining the current (I_TOT) passing through said at least one switch (FET1, FET2) at least partly on the basis of said conductivity, wherein said electrical control is arranged to be formed at least partly on the basis of said determined current.

2. A protection circuit (30) according to

claim 1

, characterized in that said physical quantity is a temperature, wherein said means for measuring the physical quantity comprise means (28) for measuring the temperature of said at least one switch (FET1, FET2).

3. A protection circuit (30) according to

claim 1

, characterized in that said physical quantity is an electrical control, wherein said means for measuring the physical quantity comprise means (27) for measuring at least one electrical control of the control means (G1, G2) of said at least one switch (FET1, FET2).

4. A protection circuit (30) according to

claim 1

, characterized in that said means for measuring the physical quantity comprise means (28) for measuring a first physical quantity affecting said at least one switch (FET1, FET2) and means (27) for measuring a second physical quantity affecting said at least one switch (FET1, FET2), and that the first physical quantity is a temperature and the second physical quantity is electrical control.

5. A protection circuit (30) according to

claim 1

, characterized in that it is arranged to protect a battery (31) from an exceptional state when the battery (31) is charged or discharged, wherein the protection circuit (30) also comprises means for measuring the voltage of the battery (31) and that the exceptional state is at least one of the following:

under-voltage, over-voltage or over-current.

6. A protection circuit (30) according to

claim 5

, characterized in that the battery (31) comprises more than one cell, and that the protection circuit (30) also comprises means for measuring the voltage of each of the cells separately.

7. A protection circuit (30) according to

claim 5

, characterized in that the battery (31) is Lithium-based.

8. A protection circuit (30) according to

claim 5

, which is connected to a host device (33) via an interface bus (BUS), characterized in that information on the exceptional state is arranged to be transmitted to the host device via the interface bus (BUS) when the protection circuit (30) detects the exceptional state.

9. A protection circuit (30) according to

claim 8

, characterized in that information on the under-voltage state is arranged to be transmitted to the host device before the under-voltage state occurs in the battery.

10. A protection circuit (30) according to

claim 1

, characterized in that it is provided with means (23) for determining the charge condition of a battery (31).

11. A protection circuit (30) according to

claim 1

, characterized in that the means (10) for providing information about the dependence of the conductivity properties of said at least one switch (FET1, FET2) on the temperature and the electrical control comprise a parameter memory (10).

12. A protection circuit (30) according to

claim 1

, characterized in that said at least one switch (FET1, FET2) is a field-effect transistor, wherein the control means is the gate (G1, G2) of the field-effect transistor (FET1, FET2) and the electrical control is a gate voltage.

13. A protection circuit (30) according to

claim 12

, characterized in that the drain-to-source resistance (R_ds(on)) of the field-effect transistor at a predetermined first temperature T₀ and a predetermined first gate voltage V₀ is stored in said parameter memory (10) as well as information on a change in the drain-to-source resistance (R_ds(on)) when the gate voltage changes at the first temperature T₀, and information on a change in the drain-to-source resistance (R_ds(on)) when the temperature changes at the first gate voltage V₀.

14. A protection circuit (30) according to

claim 12

, characterized in that the means (10) for defining the dependence of the conductivity properties of said at least one switch (FET1, FET2) on the temperature and the electrical control comprise a parameter memory (10) in which the value of the drain-to-source resistance (R_ds(on)) of the field-effect transistor (FET1, FET2) is stored for different temperature and gate voltage combinations.

15. A protection circuit (30) according to

claim 11

, which comprises means (P3, FET1, FET2) for supplying power from a battery (31) to an electronic device (33) and means (P3, FET1, FET2) for supplying power from a charging device (34) to the battery (31), characterized in that the protection circuit (30) comprises two field-effect transistors (FET1, FET2), and whose drains (D1, D2) are coupled in series in such a way that the first field-effect transistor (FET1) is arranged to control the charging of the battery (31) and the second field-effect transistor (FET2) is arranged to control the supply of power from the battery (31) to the electronic device (33).

16. A protection circuit (30) according to

claim 15

, characterized in that the means (28) for measuring the temperature of said at least one switch (FET1, FET2) comprise at least one temperature sensor (28), means (27) for measuring the electrical control of the control means (G1, G2) of said at least one switch (FET1, FET2) comprise means (27) for measuring voltage, and the protection circuit (30) comprises means (27) for measuring a voltage (U_TOT) between the source (S1) of the first field-effect transistor (FET1) and the source (S2) of the second field-effect transistor (FET2).

17. A protection circuit (30) according to

claim 16

, characterized in that the value of current (I_TOT) conducted via the field-effect transistors (FET1, FET2) is estimated according lo the following formula:

$I_{\mathrm{TOT}}=\frac{U_{\mathrm{TOT}}}{R_{\mathrm{ds}<br><br>\left(\mathrm{on}\right)<br><br>0}·<br><br>K_T·<br><br>\left(K_{\mathrm{U1}}+K_{\mathrm{U2}}\right)}$

I_TOT=Value of current conducted via the field-effect transistors (FET1, FET2),

R_ds(on)0=Drain-to-source resistance at the first temperature T₀ and at the first gate voltage V₀, which is stored in the parameter memory (10),

K_T=Temperature correction coefficient, which is obtained on the basis of the value given by the temperature sensor (28) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)) when the temperature changes at a constant gate voltage

K_U1=Gate voltage correction coefficient for the first field-effect transistor (FET1) obtained on the basis of the value given by the voltage measurement (27) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)) when the gate voltage changes at a constant temperature

K_U2=Gate voltage correction coefficient for the second field effect transistor (FET2) obtained on the basis of the value given by the voltage measurement (27) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)) when the gate voltage changes at a constant temperature

U_TOT=Voltage between the sources (S1, S2) of the field-effect transistors (FET1, FET2).

18. A protection circuit (30) according to

claim 16

, characterized in that the value of current (I_TOT) conducted via the field-effect transistors (FET1, FET2) is estimated according to the following formula:

$I_{\mathrm{TOT}}=\frac{U_{\mathrm{TOT}}}{R_{\mathrm{ds}<br><br>\left(\mathrm{on}\right)<br><br>0}·<br><br>\left(K_{\mathrm{T1}}·<br><br>K_{\mathrm{U1}}+K_{\mathrm{T2}}·<br><br>K_{\mathrm{U2}}\right)}$

I_TOT=Value of current conducted via the field-effect transistors (FET1, FET2)

R_ds(on)0=Drain-to-source resistance at the first temperature T₀ and at the first gate voltage V₀ stored in the parameter memore (10)

K_T1=Temperature correction coefficient for the first field-effect transistor (FET1) obtained on the basis of the value given by the temperature sensor (28) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)) when the temperature changes at a constant gate voltage

K_T2=Temperature correction coefficient for the second field-effect transistor (FET2) obtained on the basis of the value given by the temperature sensor (28) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)) when the temperature changes at a constant gate voltage

K_U1=Gate voltage correction coefficient for the first field-effect transistor (FET1) obtained on the basis of the value given by the voltage measurement (27) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)) when the gate voltage changes at a constant temperature

K_U2=Gate voltage correction coefficient for the second field-effect transistor (FET2) obtained on the basis of the value given by the voltage measurement (27) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)) when the gate voltage changes at a constant temperature

U_TOT=Voltage between the sources (S1, S2) of the field-effect transistors (FET1, FET2).

19. A protection circuit (30) according to

claim 16

, characterized in that the value of the current (I_TOT) conducted via the field-effect transistors (FET1, FET2) is estimated according to the following formula:

$I_{\mathrm{TOT}}=\frac{U_{\mathrm{TOT}}}{K_T·<br><br>(R_{\mathrm{ds}<br><br>\left(\mathrm{on}\right)<br><br>01}·<br><br>K_{\mathrm{U1}}+R_{\mathrm{ds}<br><br>\left(\mathrm{on}\right)<br><br>02}·<br><br>K_{\mathrm{U2})}}$

I_TOT=Value of current conducted via the field-effect transistors (FET1, FET2)

R_ds(on)01=Drain-to-source resistance of the first field-effect transistor (FET1) at the first temperature T₀ and at the first gate voltage V₀ stored in the parameter memory (10)

R_ds(on)02=Drain-to-source resistance of the second field-effect transistor (FET2) at the first temperature T₀ and at the first gate voltage V₀ stored in the parameter memory (10)

K_T=Temperature correction coefficient obtained on the basis of the value given by the temperature sensor (28) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)) when the temperature changes at a constant gate voltage

K_U1=Gate voltage correction coefficient for the first field-effect transistor (FET1) obtained on the basis of the balue given by the voltage measurement (27) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)) when the gate voltage changes at a constant temperature

K_U2=Gate voltage correction coefficient for the second field-effect transistor (FET2) obtained on the basis of the value given by the voltage measurement (27) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)) when the gate voltage changes at a constant temperature

U_TOT=Voltage between the sources (S1, S2) of the field-effect transistors (FET1, FET2).

20. A protection circuit (30) according to

claim 16

, characterized in that the value of current (I_TOT) conducted via the field-effect transistors (FET1, FET2) is estimated according to the following formula:

$I_{\mathrm{TOT}}=\frac{U_{\mathrm{TOT}}}{R_{\mathrm{ds}<br><br>\left(\mathrm{on}\right)<br><br>01}·<br><br>K_{\mathrm{T1}}·<br><br>K_{\mathrm{U1}}+R_{\mathrm{ds}<br><br>\left(\mathrm{on}\right)<br><br>02}·<br><br>K_{\mathrm{T2}}·<br><br>K_{\mathrm{U2}})}$

I_TOT=Value of current conducted via the field-effect transistors (FET1, FET2)

R_ds(on)01=Drain-to-source resistance of the first field-effect transistor (FET1) at the first temperature T₀ and at the first gate voltage V₀ stored in the parameter memory (10)

R_ds(on)02=Drain-to-source resistance of the second field-effect transistor (FET2) at the first temperature T₀ and at the first gate voltage V₀ stored in the parameter memory (10)

K_T1=Temperature correction coefficient for the first field-effect transistor (FET1) obtained on the basis of the value given by the temperature sensor (28) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)01) when the temperature changes at a constant gate voltage

K_T2=Temperature correction coefficient for the second field-effect transistor (FET2) obtained on the basis of the value given by the temperature sensor (28) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)02)) when the temperature changes at a constant gate voltage

K_U1=Gate voltage correction coefficient for the first field-effect transistor (FET1) obtained on the basis of the value given by the voltage measurement (27) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)) when the gate voltage changes at a constant temperature

K_U2=Gate voltage correction coefficient for the second field-effect transistor (FET2) obtained on the basis of the value given by the voltage measurement (27) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)) when the gate voltage changes at a constant temperature

U_TOT=Voltage between the sources (S1, S2) of the field-effect transistors (FET1, FET2).

21. An integrated circuit (35) provided with a protection circuit (30) which comprises at least one switch (FET1, FET2) comprising at least one control means (G1, G2) for adjusting the conductivity of said at least one switch (FET1, FET2), the conductivity being arranged to be adjustable by means of an electrical control conducted to the control means (G1, G2), characterized in that the protection circuit (30) comprises means (22, 25, 26) for forming the electrical control, means (27, 28) for measuring at least one physical quantity affecting said at least one switch (FET1, FET2), means (10) for providing information about the dependence of the conductivity properties of said at least one switch (FET1, FET2) on said at least one physical quantity, means (29) for determining the conductivity of said at least one switch (FET1, FET2) on the basis of said at least one physical quantity and the conductivity properties of said at least one switch (FET1, FET2) and means (29, 27) for determining the current (I_TOT) passing through said at least one switch (FET1, FET2) at least partly on the basis of said conductivity, wherein said electrical control is arranged to be formed at least partly on the basis of said determined current.

22. A host device (33), which is provided with a protection circuit (30) which comprises at least one switch (FET1, FET2) comprising at least one control means (G1, G2) for adjusting the conductivity of said at least one switch (FET1, FET2), the conductivity being arranged to be adjustable by means of an electrical control conducted to the control means (G1, G2), characterized in that the protection circuit (30) comprises means (22, 25, 26) for forming the electrical control, means (27, 28) for measuring at least one physical quantity affecting said at least one switch (FET1, FET2), means (10) for providing information about the dependence of the conductivity properties of said at least one switch (FET1, FET2) on said at least one physical quantity, means (29) for determining the conductivity of said at least one switch (FET1, FET2) on the basis of said at least one physical quantity and the conductivity properties of said at least one switch (FET1, FET2) and means (29, 27) for determining the current (I_TOT) passing through said at least one switch (FET1, FET2) at least partly on the basis of said conductivity, wherein said electrical control is arranged to be formed at least partly on the basis of said determined current.

23. A host device (33) according to

claim 22

, which is arranged in connection with a battery (31), characterized in that the protection circuit (30) is provided with means (23) for determining the charge condition of the battery (31), wherein information on the charge condition is arranged to be transmitted to the host device (33) via an interface bus (BUS), the information being arranged to be presented in the host device (33).

24. A host device (33) according to

claim 23

, characterized in that information on the charge condition of the battery (31) is utilized to switch off the host device (33).

25. A host device (33) according to

claim 22

,

23

or 24, characterized in that it is a wireless communication device.

26. A host device (33) according to any of

claims 22

to

25

, the power source of which is arranged to be a battery (31), characterized in that said protection circuit (30) is located in the host device (33), and the battery (31) is arranged to be detachably connected to-the host device (33).

27. A host device (33) according to

claim 26

, characterized in that said battery (31) is integrated in the host device (33).

28. A battery (31) in connection with which a protection circuit (30) is arranged which comprises at least one switch (FET1, FET2) comprising at least one control means (G1, G2) for adjusting the conductivity of said at least one switch (FET1, FET2), the conductivity being arranged to be adjustable by means of an electrical control conducted to the control means (G1, G2), characterized in that the protection circuit (30) comprises means (22, 25, 26) for forming the electrical control, means (27, 28) for measuring at least one physical quantity affecting said at least one switch (FET1, FET2), means (10) for providing information about the dependence of the conductivity properties of said at least one switch (FET1, FET2) on said at least one physical quantity, means (29) for determining the conductivity of said at least one switch (FET1, FET2) on the basis of said at least one physical quantity and the conductivity properties of said at least one switch (FET1, FET2) and means (29, 27) for determining the current (I_TOT) passing through said at least one switch (FET1, FET2) at least partly on the basis of said conductivity, wherein said electrical control is arranged to be formed at least partly on the basis of the determined current.

29. A battery (31) according to

claim 28

, which is arranged as a power source for a host device (33), characterized in that said battery (31) and protection circuit (30) are located in a battery pack (32) which is arranged to be to be detachably connected to the host device (33).

30. A method for protecting a battery (31) by means of a protection circuit, the protection circuit (30) being provided with at least one switch (FET1, FET2) which comprises at least one control means (G1, G2) for adjusting the conductivity of said at least one switch (FET1, FET2), by means of an electrical control conducted to the control means (G1, G2), characterized in that in the method at least one physical quantity affecting said at least one switch (FET1, FET2) is measured, the conductivity of said at least one switch (FET1, FET2) is determined on the basis of said at least one physical quantity and the conductivity properties of said at least one switch (FET1, FET2) and the current (I_TOT) conducted through said at least one switch (FET1, FET2) is determined at least partly on the basis of said conductivity, wherein said electrical control is formed at least partly on the basis of the determined current.

31. A method according to

claim 30

, characterized in that said physical quantity is a temperature, wherein the temperature of said at least one switch (FET1, FET2) is measured.

32. A method according to

claim 30

, characterized in that said physical quantity is an electrical control, wherein the electrical control of the control means (G1, G2) is measured.

33. A method according to

claim 30

, characterized in that a first physical quantity affecting said at least one switch (FET1, FET2) and a second physical quantity affecting said at least one switch (FET1, FET2) are measured, said physical quantities are temperature and electrical control, wherein the temperature and the electrical control of the control means (G1, G2) is measured.

34. A method according to

claim 30

, characterized in that the protection circuit (30) is used to protect a battery (31) from an exceptional state when the battery is charged or discharged, wherein the protection circuit (30) also comprises means for measuring the voltage of the battery (31), and that the exceptional state is at least one of the following:

under-voltage, over-voltage or over-current.

35. A method according to

claim 34

, characterized in that the battery (31) used is a Lithium-based battery.

36. A method according to

claim 34

, in which the protection circuit (30) is connected to a host device (33) via an interface bus (BUS), characterized in that when the protection circuit (30) detects the exceptional state, information thereon is transmitted to the host device via the interface bus (BUS).

37. A method according to

claim 34

, characterized in that in the method the charge condition of the battery (31) is determined.

38. A method according to

claim 33

, characterized in that said at least one switch (FET1, FET2) used is a field-effect transistor, wherein the control means is the gate (G1, G2) of the field-effect transistor, the electrical control is a gate voltage and the gate voltage is used to control the drain-to-source resistance (R_ds(on)) between the drain (D1, D2) and the source (S1, S2) of the field-effect transistor (FET1, FET2).

39. A method according to

claim 38

, in which current is supplied from the battery (31) to an electronic device or from a charging device (34) to the battery, characterized in that the protection circuit (30) comprises two field-effect transistors (FET1, FET2) connected in series from the drains (D1, D2), in such a way that the first field-effect transistor (FET1) controls charging of the battery, and the second field-effect transistor (FET2) controls the supplied power from the battery (31) to the electronic device (33).

40. A method according to

claim 39

, characterized in that to define the dependence of the conductivity properties of said at least one switch (FET1, FET2) on the temperature and the electrical control, the drain-to-source resistance (R_ds(on)) of the field-effect transistor (FET1, FET2) at a predetermined first temperature T₀ and at a first gate voltage V₀ is stored as well as information on a change in the drain-to-source resistance (R_ds(on)) when the gate voltage changes at the first temperature T₀ and information on a change in the drain-to-source resistance (R_ds(on)) when the temperature changes at the first gate voltage V₀, and that a parameter memory (10) is used to store the information.

41. A method according to

claim 39

, characterized in that to define the dependence of the conductivity properties of said at least one switch (FET1, FET2) on the temperature and the electrical control, the value of the drain-to-source resistance (R_ds(on)) of the field-effect transistor (FET1, FET2) for different combinations of temperature and gate voltage is stored in a parameter memory (10).

42. A method according to

claim 40

, characterized in that the temperature of said at least one switch (FET1, FET2) is measured by means of a temperature sensor (28), the gate voltage is measured and the voltage (U_TOT) between the source (S1) of the first field-effect transistor (FET1) and the source (S2) of the second field-effect transistor (FET2) is measured.

43. A method according to

claim 42

, characterized in that the current (I_TOT) conducted via the field-effect transistors (FET1, FET2) is estimated according to the following formula:

$I_{\mathrm{TOT}}=\frac{U_{\mathrm{TOT}}}{R_{\mathrm{ds}<br><br>\left(\mathrm{on}\right)<br><br>0}·<br><br>K_T·<br><br>\left(K_{\mathrm{U1}}+K_{\mathrm{U2}}\right)}$

I_TOT=Value of current conducted via the field-effect transistors (FET1, FET2),

R_ds(on)0=Drain-to-source resistance at the first temperature T₀ and at the first gate voltage V₀ stored in the parameter memory (10),

K_T=Temperature correction coefficient obtained on the basis of the value given by the temperature sensor (28) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)) when the temperature changes at a constant gate voltage

K_U1=Gate voltage correction coefficient for the first field-effect transistor (FET1) obtained on the basis of the value given by the voltage measurement (27) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)) when the gate voltage changes at a constant temperature

K_U2=Gate voltage correction coefficient for the second field effect transistor (FET2) obtained on the basis of the value given by the voltage measurement (27) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)) when the temperature changes at a constant temperature

U_TOT=Voltage between the sources (S1, S2) of the field-effect transistors (FET1, FET2).

44. A method according to

claim 42

, characterized in that the current (I_TOT) conducted via the field-effect transistors (FET1, FET2) is estimated according to the following formula:

$I_{\mathrm{TOT}}=\frac{U_{\mathrm{TOT}}}{R_{\mathrm{ds}<br><br>\left(\mathrm{on}\right)<br><br>0}·<br><br>\left(K_{\mathrm{T1}}·<br><br>K_{\mathrm{U1}}+K_{\mathrm{T2}}·<br><br>K_{\mathrm{U3}}\right)}$

I_TOT=Value of current conducted via the field-effect transistors (FET1, FET2)

R_ds(on)0=Drain-to-source resistance at the first temperature T₀ and at the first gate voltage V₀ stored in the parameter memory (10)

K_T1=Correction coefficient of the temperature of the first field-effect transistor (FET1) obtained on the basis of the value given by the temperature sensor (28) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)) when the temperature changes at a constant gate voltage

K_T2=Temperature correction coefficient for the second field effect transistor (FET2) obtained on the basis of the value given by the temperature sensor (28) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)) when the temperature changes at a constant gate voltage

K_U1=Gate voltage correction coefficient for the first field-effect transistor (FET1) obtained on the basis of the value given by the voltage measurement (27) from the information stored in the parameter memory (10) on the change in the drain-to-source resistance (R_ds(on)) when the gate voltage changes at a constant temperature

K_U2=Gate voltage correction coefficient for the second field effect transistor (FET2) obtained on the basis of the value given by the voltage measurement (27) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)) when the gate voltage changes at a constant temperature

U_TOT=Voltage between the sources (S1, S2) of the field-effect transistors (FET1, FET2).

45. A method according to

claim 42

, characterized in that the current (I_TOT) conducted via the field-effect transistors (FET1, FET2) is estimated according to the following formula:

$I_{\mathrm{TOT}}=\frac{U_{\mathrm{TOT}}}{K_T·<br><br>\left(R_{\mathrm{ds}<br><br>\left(\mathrm{on}\right)<br><br>01}·<br><br>K_{\mathrm{U1}}+R_{\mathrm{ds}<br><br>\left(\mathrm{on}\right)<br><br>02}·<br><br>K_{\mathrm{U2}}\right)}$

I_TOT=Value of current conducted via the field-effect transistors (FET1, FET2)

R_ds(on)01=Drain-to-source resistance of the first field-effect transistor (FET1) at the first temperature T₎ and at the first gate voltage V₀ stored in the parameter memory (10)

R_ds(on)02=Drain-to-source resistance of the second field-effect transistor (FET2) at the first temperature T₀ and at the first gate voltage V₀ stored in the parameter memory (10)

K_T=Temperature correction coefficient obtained on the basis of the value given by the temperature sensor (28) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)) when the temperature changes at a constant gate voltage

K_U1=Gate voltage correction coefficient for the first field-effect transistor (FET1) obtained on the basis of the value given by the voltage measurement (27) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)01) when the gate voltage changes at a constant temperature

K_U2=Gate voltage correction coefficient for the second field effect transistor (FET2) obtained on the basis of the value given by the voltage measurement (27) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)02) when the gate voltage changes at a constant temperature

U_TOT=Voltage of the sources (S1, S2) of the field-effect transistors (FET1, FET2).

46. A method according to

claim 42

, characterized in that the current (I_TOT) conducted via the field-effect transistors (FET1, FET2) is estimated according to the following formula:

$I_{\mathrm{TOT}}=\frac{U_{\mathrm{TOT}}}{R_{\mathrm{ds}<br><br>\left(\mathrm{on}\right)<br><br>01}·<br><br>K_{\mathrm{T1}}·<br><br>K_{\mathrm{UT}}+R_{\mathrm{ds}<br><br>\left(\mathrm{on}\right)<br><br>02}·<br><br>K_{\mathrm{T2}}·<br><br>K_{\mathrm{U2}}}$

I_TOT=Value of current conducted via the field-effect transistors (FET1, FET2)

R_ds(on)01=Drain-to-source resistance of the first field-effect transistor (FET1) at the first temperature T₀ and at the first gate voltage V₀ stored in the parameter memory (10)

R_ds(on)02=Drain-to-source resistance of the second field-effect transistor (FET2) at the first temperature T₀ and at te first gate voltage V₀ stored in the parameter memory (10)

K_T1=Temperature correction coefficient for the first field-effect transistor (FET1) obtained on the basis of the value given by the temperature sensor (28) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)01) when the temperature changes at a constant gate voltage

K_T2=Temperature correction coefficient for the second field effect transistor (FET2) obtained on the basis of the value given by the temperature sensor (28) from the information stored in the paraeter memory (10) on the change in drain-to-source resistance (R_ds(on)02) when the temperature changes at a constant gate voltage

K_U1=Gate voltage correction coefficient for the first field-effect transistor (FET1) obtained on the basis of the value given by the voltage measurement (27) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)01) when the gate voltage changes at a constant temperature

K_U2=Gate voltage correction coefficient for the second field effect transistor (FET2) obtained on the basis of the value given by the voltage measurement (27) from the information stored in the parameter memory (10) on the change in drain-to-source resistance (R_ds(on)02) when the gate voltage changes at a constant temperature

U_TOT=Voltage between the sources (S1, S2) of the field-effect transistors (FET1, FET2).