Method and structure for reducing leakage currents of active area diodes and source/drain diffusions
First Claim
1. A method of providing isolation between adjacent regions of an integrated circuit comprising the steps of:
- selecting a circuit layout for fabrication of said integrated circuit on a substrate, including defining adjacent substrate locations for a first region and a second region for which leakage current from said second region to said substrate is undesired during operation of said integrated circuit, at least said second region being an active region within which a dopant is to be introduced;
forming a guard layer on said substrate such that said guard layer resides on a peripheral portion of said second region, said peripheral portion of said second region extending along an edge of said first region; and
introducing said dopant into said second region to establish predetermined electrical characteristics within said second region, said guard layer inhibiting introduction of said dopant into said peripheral portion, thereby leaving a transition strip within said second region and along said edge of said first region.
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Abstract
A fabrication method for providing isolation between adjacent regions of an integrated circuit includes providing a guard layer over field edges that are the interfaces between field oxide regions and diffusion regions in which dopant is introduced. The guard layer will inhibit introduction of dopant along the field-edge, so that a substantially dopant-free transition strip is formed. The transition strip inhibits current leakage from the active region to the field oxide region. In one embodiment, the active region is an active area diode, such as used to form an Active Pixel Sensor (APS) pixel. The guard layer is biased so as to further inhibit current leakage during circuit operation. In another embodiment, the method is used in the fabrication of transistors for APS pixels having an overlay photodiode structure.
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Citations
21 Claims
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1. A method of providing isolation between adjacent regions of an integrated circuit comprising the steps of:
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selecting a circuit layout for fabrication of said integrated circuit on a substrate, including defining adjacent substrate locations for a first region and a second region for which leakage current from said second region to said substrate is undesired during operation of said integrated circuit, at least said second region being an active region within which a dopant is to be introduced;
forming a guard layer on said substrate such that said guard layer resides on a peripheral portion of said second region, said peripheral portion of said second region extending along an edge of said first region; and
introducing said dopant into said second region to establish predetermined electrical characteristics within said second region, said guard layer inhibiting introduction of said dopant into said peripheral portion, thereby leaving a transition strip within said second region and along said edge of said first region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method of forming an active area diode for an imaging circuit comprising steps of:
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forming a field oxide region on a substrate, said field oxide region having an edge that at least partially defines a geometry of an active area diode region;
forming a conductive layer on said substrate such that said conductive layer generally follows a contour of said edge of said field oxide region, while extending onto a peripheral portion of said active area diode region; and
modifying electrical characteristics of said active area diode region such that said active area diode region is responsive to light energy, said conductive layer inhibiting said modification of said electrical characteristics within said peripheral region. - View Dependent Claims (13, 14, 15)
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16. A method of forming an overlay photodiode structure of an imaging circuit comprising steps of:
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forming a field oxide region on a substrate, said field oxide region having an edge that at least partially defines a geometry of an active region of a transistor;
forming a conductive layer on said substrate such that said conductive layer generally follows a contour of said edge of said field oxide region, while extending onto a peripheral portion of said active region;
forming said transistor on said substrate, including doping said active region; and
forming at least one overlayer to provide a photodiode arrangement that overlays said substrate, said photodiode arrangement being responsive to light energy and being electrically coupled to said transistor. - View Dependent Claims (17)
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18. An integrated circuit having CMOS transistors comprising:
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a substrate;
a first region along a surface of said substrate, said first region having an edge, said first region being a field oxide region;
a second region along said surface, said second region having a periphery which is adjacent to said edge of said first region;
a guard layer residing on said surface and following adjacency of said first and second regions, said guard layer extending onto only a peripheral portion of said second region;
wherein said second layer includes said peripheral transition portion that is substantially free of a selected dopant and includes a remaining active portion in which said selected dopant is implanted, said peripheral transition portion being defined by said guard layer extending onto said second region. - View Dependent Claims (19, 20, 21)
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Specification