Vertical MOS transistor
First Claim
1. A vertical MOS transistor comprising:
- a semiconductor substrate of a first conductivity type;
a first epitaxial growth layer of a second conductivity type formed on the semiconductor substrate;
a second epitaxial growth layer of the first conductivity type formed on the first epitaxial growth layer;
a trench formed so as to reach an inside of the semiconductor substrate through the second epitaxial growth layer and the first epitaxial growth layer;
a gate oxide film formed along a surface of the second epitaxial growth layer and a wall surface of the trench;
a gate filled in the trench so as to be surrounded by the gate oxide film;
a drain layer of the first conductivity type formed on the surface of the second epitaxial growth layer and in a region a desired distance away from the gate;
a gate electrode connected to the gate;
a drain electrode connected to the drain layer; and
a source electrode connected to the semiconductor substrate.
3 Assignments
0 Petitions
Accused Products
Abstract
There are provided a vertical MOS transistor in which a high frequency characteristic is improved by reducing a feedback capacitance, and a method of manufacturing the same. When a gate voltage is applied to a gate electrode, a channel is formed in a p− epitaxial growth layer along a trench, and an electron current flows from an n+ drain layer to the p− epitaxial growth layer. In this case, an overlapping area between a gate and the drain layer through a gate oxide film is smaller than prior art, and the capacitance between the gate and the drain layer is smaller than the prior art. Thus, the feedback capacitance becomes small and the high frequency characteristic is improved. Further, since a portion of the gate oxide film at the bottom of the trench is thicker than the portion at the side wall, the distance between the gate and the n+ semiconductor substrate becomes larger than the prior art, and the capacitance formed between the gate and the n+ semiconductor substrate is smaller than the prior art. Thus, the high frequency characteristic is improved as compared with the prior art.
0 Citations
13 Claims
-
1. A vertical MOS transistor comprising:
-
a semiconductor substrate of a first conductivity type;
a first epitaxial growth layer of a second conductivity type formed on the semiconductor substrate;
a second epitaxial growth layer of the first conductivity type formed on the first epitaxial growth layer;
a trench formed so as to reach an inside of the semiconductor substrate through the second epitaxial growth layer and the first epitaxial growth layer;
a gate oxide film formed along a surface of the second epitaxial growth layer and a wall surface of the trench;
a gate filled in the trench so as to be surrounded by the gate oxide film;
a drain layer of the first conductivity type formed on the surface of the second epitaxial growth layer and in a region a desired distance away from the gate;
a gate electrode connected to the gate;
a drain electrode connected to the drain layer; and
a source electrode connected to the semiconductor substrate. - View Dependent Claims (2, 3, 5, 6)
-
-
4. A vertical MOS transistor comprising:
-
a semiconductor substrate of a first conductivity type;
an epitaxial growth layer of a second conductivity type formed on the semiconductor substrate;
a trench formed so as to reach an inside of the semiconductor substrate through the epitaxial growth layer;
a gate oxide film formed along a surface of the epitaxial growth layer and a wall surface of the trench;
a gate filled in the trench so as to be surrounded by the gate oxide film;
a diffusion layer of the first conductivity type formed on the surface of the second epitaxial growth layer and in a region a desired distance away from the gate;
a drain layer of the first conductivity type formed on the surface of the diffusion layer; and
a body region of the second conductivity type formed in a desired region of the surface of the epitaxial growth layer.
-
-
7. A method of manufacturing a vertical MOS transistor, comprising:
-
a first epitaxial growth layer formation step of forming a first epitaxial growth layer of a second conductivity type on a semiconductor substrate of a first conductivity type;
a second epitaxial growth layer formation step of forming a second epitaxial growth layer of the first conductivity type on the first epitaxial growth layer;
a trench formation step of forming a trench by performing an anisotropic etching from a trench formation scheduled region on the second epitaxial growth layer through the second epitaxial growth layer and the first epitaxial growth layer to an inside of the semiconductor substrate;
a gate oxide film formation step of forming a gate oxide film along a surface of the second epitaxial growth layer and a wall surface of the trench;
a polycrystalline silicon layer deposit step of depositing a polycrystalline silicon layer on the gate oxide film;
a gate formation step of forming a gate in the trench by performing an etching to the polycrystalline silicon layer;
a drain layer formation step of forming a drain layer of the first conductivity type on the surface of the second epitaxial growth layer and in a region a desired distance away from the gate;
an intermediate insulating film deposit step of depositing an intermediate insulating film on the gate oxide film;
a contact hole formation step of forming a contact hole in an electrode formation scheduled region of the intermediate insulating film and the gate oxide film on the drain layer; and
a drain electrode formation step of forming a drain electrode coming in contact with the drain layer through the contact hole.
-
-
8. A method of manufacturing a vertical MOS transistor, comprising:
-
a first epitaxial growth layer formation step of forming a first epitaxial growth layer of a second conductivity type on a semiconductor substrate of a first conductivity type;
a second epitaxial growth layer formation step of forming a second epitaxial growth layer of the first conductivity type on the first epitaxial growth layer;
a trench formation step of forming a trench by performing an anisotropic etching from a trench formation scheduled region on the second epitaxial growth layer through the second epitaxial growth layer and the first epitaxial growth layer to an inside of the semiconductor substrate;
a gate oxide film formation step of forming a gate oxide film along a surface of the second epitaxial growth layer and a wall surface of the trench;
a polycrystalline silicon layer deposit step of depositing a polycrystalline silicon layer on the gate oxide film;
a gate formation step of forming a gate in the trench by performing an etching to the polycrystalline silicon layer;
an intermediate insulating film deposit step of depositing an intermediate insulating film on the gate oxide film;
a contact hole formation step of forming a contact hole in an electrode formation scheduled region of the intermediate insulating film and the gate oxide film;
a drain layer formation step of forming a drain layer of the first conductivity type on a surface of the second epitaxial growth layer by using the intermediate insulating film having the contact hole formed thereon as a mask; and
a drain electrode formation step of forming a drain electrode coming in contact with the drain layer through the contact hole.
-
-
9. A method of manufacturing a vertical MOS transistor, comprising:
-
a first epitaxial growth layer formation step of forming a first epitaxial growth layer of a second conductivity type on a semiconductor substrate of a first conductivity type;
a second epitaxial growth layer formation step of forming a second epitaxial growth layer of the first conductivity type on the first epitaxial growth layer;
a trench formation step of forming a trench by performing an anisotropic etching from a trench formation scheduled region on the second epitaxial growth layer through the second epitaxial growth layer and the first epitaxial growth layer to an inside of the semiconductor substrate;
a gate oxide film formation step of forming a gate oxide film along a surface of the second epitaxial growth layer and a wall surface of the trench;
a polycrystalline silicon layer deposit step of depositing a polycrystalline silicon layer on the gate oxide film;
a gate formation step of forming a gate in the trench by performing an etching to the polycrystalline silicon layer;
a drain layer formation step of forming a drain layer of the first conductivity type on the surface of the second epitaxial growth layer and in a region a desired distance away from the gate; and
a body region formation step of forming a body region of the second conductivity type so as to reach an inside of the first epitaxial growth layer through the second epitaxial growth layer.
-
-
10. A method of manufacturing a vertical MOS transistor, comprising:
-
a first epitaxial growth layer formation step of forming a first epitaxial growth layer of a second conductivity type on a semiconductor substrate of a first conductivity type;
a first body region formation step of forming a first body region of the second conductivity type in a desired region of a surface of the first epitaxial growth layer;
a second epitaxial growth layer formation step of forming a second epitaxial growth layer of the first conductivity type on the first epitaxial growth layer and the first body region;
a trench formation step of forming a trench by performing an anisotropic etching from a trench formation scheduled region on the second epitaxial growth layer through the second epitaxial growth layer and the first epitaxial growth layer to an inside of the semiconductor substrate;
a gate oxide film formation step of forming a gate oxide film along a surface of the second epitaxial growth layer and a wall surface of the trench;
a polycrystalline silicon layer deposit step of depositing a polycrystalline silicon layer on the gate oxide film;
a gate formation step of forming a gate in the trench by performing an etching to the polycrystalline silicon layer;
a drain layer formation step of forming a drain layer of the first conductivity type on the surface of the second epitaxial growth layer and in a region a desired distance away from the gate; and
a second body region formation step of forming a second body region in a region an arbitrary distance away from the drain layer in the inside of the second epitaxial growth layer so as to come in contact with the first body region.
-
-
11. A method of manufacturing a vertical MOS transistor comprising:
-
an epitaxial growth layer formation step of forming an epitaxial growth layer of a second conductivity type on a semiconductor substrate of a first conductivity type;
a trench formation step of forming a trench by performing an anisotropic etching from a trench formation scheduled region on the epitaxial growth layer through the epitaxial growth layer to an inside of the semiconductor substrate;
a gate oxide film formation step of forming a gate oxide film along a surface of the epitaxial growth layer and a wall surface of the trench;
a polycrystalline silicon layer deposit step of depositing a polycrystalline silicon layer on the gate oxide film;
a gate formation step of forming a gate in the trench by performing an arbitrary amount of etching to the polycrystalline silicon layer;
a diffusion layer formation step of forming a diffusion layer of the first conductivity type on the surface of the epitaxial growth layer and in a region a desired distance away from the gate;
a drain layer formation step of forming a drain layer of the first conductivity type in the diffusion layer; and
a body region formation step of forming a body region of the second conductivity type in a desired region of the surface of the epitaxial growth layer.
-
-
12. A method of manufacturing a vertical MOS transistor, comprising:
-
a first epitaxial growth layer formation step of forming a first epitaxial growth layer of a second conductivity type on a semiconductor substrate of a first conductivity type;
a body region formation step of forming a body region of the second conductivity type in the first epitaxial growth layer so as to come in contact with the semiconductor substrate;
a second epitaxial growth layer formation step of forming a second epitaxial growth layer of the first conductivity type on the first epitaxial growth layer;
a trench formation step of forming a trench by performing an anisotropic etching from a trench formation scheduled region on the second epitaxial growth layer through the second epitaxial growth layer and the first epitaxial growth layer to an inside of the semiconductor substrate;
a gate oxide film formation step of forming a gate oxide film along a surface of the second epitaxial growth layer and a wall surface of the trench;
a polycrystalline silicon layer deposit step of depositing a polycrystalline silicon layer on the gate oxide film;
a gate formation step of forming a gate in the trench by performing an arbitrary amount of etching to the polycrystalline silicon layer; and
a drain layer formation step of forming a drain layer of the first conductivity type on the surface of the second epitaxial growth layer and in a region a desired distance away from the gate.
-
-
13. A method of manufacturing a vertical MOS transistor, comprising:
-
a first epitaxial growth layer formation step of forming a first epitaxial growth layer of a first conductivity type on a semiconductor substrate of a first conductivity type;
a body region formation step of forming a body region of the second conductivity type in a desired region of the first epitaxial growth layer so as to come in contact with the semiconductor substrate;
a high concentration diffusion region formation step of forming a high concentration diffusion region of the first conductivity type in a region of the first epitaxial growth layer other than the body region;
a second epitaxial growth layer formation step of forming a second epitaxial growth layer of the second conductivity type on the first epitaxial growth layer;
a third epitaxial growth layer formation step of forming a third epitaxial growth layer of the first conductivity type on the second epitaxial growth layer;
a trench formation step of forming a trench by performing an anisotropic etching from a trench formation scheduled region on the third epitaxial growth layer through the third epitaxial growth layer and the second epitaxial growth layer to an inside of the first epitaxial growth layer;
a gate oxide film formation step of forming a gate oxide film along a surface of the third epitaxial growth layer and a wall surface of the trench;
a polycrystalline silicon layer deposit step of depositing a polycrystalline silicon layer on the gate oxide film;
a gate formation step of forming a gate in the trench by performing an arbitrary amount of etching to the polycrystalline silicon layer; and
a drain layer formation step of forming a drain layer of the first conductivity type on the surface of the third epitaxial growth layer and in a region a desired distance away from the gate.
-
Specification