Multiprocessor control system for cycles, for example for competition bicycles

• US 20010027495A1
• Filed: 03/14/2001
• Published: 10/04/2001
• Est. Priority Date: 03/29/2000
• Status: Active Grant

• Current Assignee: Campagnolo S.R.L.
• Original Assignee: Campagnolo S.R.L.
• Inventors: Campagnolo, Valentino
• Granted Patent: US 6,757,567 B2
• Time in Patent Office: Days
• US Class Current: 709/248
• CPC Class Codes: A63B 24/00 Electric or electronic controls for exercising apparatus of preceding groups; Controlling or monitoring of exercises, sportive games, training or athletic performances
• CPC Class Codes: B62M 25/045 having single actuating means operating both front and rear derailleur
• CPC Class Codes: B62M 25/08 with electrical or fluid transmitting systems
• CPC Class Codes: G01C 22/002 for cycles
• CPC Class Codes: H04L 67/12 specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks

Abstract

An electronic control system for cycles, for use in association to a set of sensors, a set of actuators, and a set of control members associated to the cycle, comprises:

a first processor unit having the function of processing and displaying information;

a second processor unit with the function of communication control unit and of interfacing with said set of control members; and

a third processor unit having the function of interfacing with said set of sensors and said set of actuators. The first processor unit, the second processor unit, and the third processor unit are connected together via asynchronous bi-directional communication channels.

Claims

1. An electronic control system for cycles, for use in association to a set of sensors, a set of actuators, and a set of control members associated to the cycle, said electronic system comprising:

a first processor unit which is able to function as a unit for processing and displaying information;

a second processor unit which is able to function as a unit for controlling communication and for interfacing with said set of control members; and

a third processor unit which is able to function as a unit for interfacing with said set of sensors and said set of actuators,

said first processor unit, said second processor unit, and said third processor unit being interconnected via asynchronous bi-directional communication channels.

2. The system according to

claim 1

, comprising communication channels which respectively connect said second processor unit to said first processor unit and said second processor unit to said third processor unit, in the absence of direct communication channels between said first processor unit and said third processor unit.

3. The system according to

claim 1

, wherein said third processor unit comprises at least one processor configured for interfacing with at least one subset of said set of sensors via a wireless network.

4. The system according to

claim 1

, wherein at least one of said communication channels carries, associated thereto, sensor means for detecting interruption of the corresponding communication channel.

5. The system according to

claim 4

, wherein said sensing means comprise a resistor associated to at least one receiving end of the respective connection, the absence of signal across said resistor indicating the interruption of the corresponding communication channel.

6. The system according to

claim 4

, wherein said at least one communication channel is the communication channel between said first processor unit and said second processor unit, and wherein first processor unit is selectively separable from the system;

the interruption of said at least one communication channel indicating the fact that said first processor unit has been separated from the system.

7. The system according to

claim 1

, wherein said second processor unit and said third processor unit are configured in such a way as to perform at least one of the functions selected from the group consisting of:

transmission, from said third processor unit to said second processor unit, of data gathered by said set of sensors;

querying of said third processor unit from said second processor unit to ascertain the state of operation of said third processor unit;

forwarding from said second processor unit to said third processor unit of requests for commands coming from said set of controls;

operation, at least partial, of said third processor unit in a state of quiescence with the faculty of selective re-activation from said second processor unit; and

selective enabling of transfer of information from said third processor unit to said second processor unit via a control signal.

8. The system according to

claim 1

, wherein said second processor unit comprises:

a communication processor configured for managing said communication channels; and

an input circuit acting as interface with said set of controls.

9. The system according to

claim 1

, wherein said third processor unit comprises:

a respective first processor acting as a wireless-type interface in regard to a subset of said set of sensors; and

a respective second control processor which is able to act as interface in regard to at least one between another subset of said set of sensors and said set of actuators.

10. The system according to

claim 1

, wherein said first processor unit and said second processor unit are configured for exchanging information organized in byte frames having a variable length according to the type of information to be transmitted.

11. The system according to

claim 1

, wherein said third processor unit and said second processor unit are configured for exchanging information organized in byte frames having a variable length according to the type of information to be transmitted.

12. The system according to

claim 10

wherein said byte frames comprise at least one header byte.

13. The system according to

claim 10

, wherein said byte frames comprise at least one control byte.

14. The system according to

claim 10

, wherein said bytes comprise a trailing edge for the initial bit and two stop bits.

15. The system according to

claim 2

, wherein said first processor unit is configured for being mounted on the handlebars of the cycle.

16. The system according to

claim 1

, wherein said third processor unit is configured for being mounted in the vicinity of the bottle-cage support of the cycle.

17. The system according to

claim 1

, comprising at least one power-supply source for electrical supply of said second processor unit and said third processor unit, said at least one power-supply source being configured for being mounted on the cycle.

18. The system according to

claim 17

, wherein associated to the communication channel connecting said second processor unit to said third processor unit is at least one lead for transmission of power supply.

19. The system according to

claim 2

, wherein said main processor carries, associated thereto, a respective autonomous power-supply source.