CD-ROM decoder

• US 20010027550A1
• Filed: 03/27/2001
• Published: 10/04/2001
• Est. Priority Date: 03/28/2000
• Status: Abandoned Application

• Current Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Inventors: Ishibashi, Masayuki, Suzuki, Takayuki, Tsuda, Hiroyuki
• Application Number:
  US09/818,048
• Publication Number:
  US 20010027550A1
• Time in Patent Office: Days
• US Class Current: 714/763
• CPC Class Codes: G06F 3/0614 Improving the reliability of storage systems
• CPC Class Codes: G06F 3/0656 Data buffering arrangements
• CPC Class Codes: G06F 3/0677 Optical disk device, e.g. CD-ROM, DVD
• CPC Class Codes: G11B 20/10 Digital recording or reproducing
• CPC Class Codes: G11B 20/10527 Audio or video recording; Data buffering arrangements G11B20/12 - G11B20/18 take precedence
• CPC Class Codes: G11B 20/18 Error detection or correction; Testing , e.g. of drop-outs

Abstract

A CD-ROM decoder that reduces the load on a microcomputer. The CD-ROM decoder temporarily stores in a buffer memory in sector units digital data. The CD-ROM decoder processes the digital data by correcting and detecting code errors included in the digital data. The CD-ROM decoder includes a first counter for counting the number of sectors of the digital data temporarily stored in the buffer memory to generate a first count value and a second counter for counting the number of sectors of the processed digital data transferred from the buffer memory to generate a second count value. A first buffering control circuit deciding an unused capacity of the buffer memory based on the first and second count values to stop the storing of the digital data to the buffer memory when the unused capacity is equal to or less than a predetermined value.

Claims

1. A CD-ROM decoder for temporarily storing in a buffer memory in sector units digital data having a predetermined number of bytes and a predetermined format, processing the digital data by correcting and detecting code errors included in the digital data, and transferring the processed digital data, the CD-ROM decoder comprising:

a first counter for counting the number of sectors of the digital data temporarily stored in the buffer memory to generate a first count value;

a second counter for counting the number of sectors of the processed digital data transferred from the buffer memory to generate a second count value; and

a first buffering control circuit connected to the first and second counters for deciding an unused capacity of the buffer memory based on the first and second count values to stop the storing of the digital data to the buffer memory when the unused capacity is equal to or less than a predetermined value.

2. The CD-ROM decoder according to

claim 1

, wherein, after the storing of the digital data to the buffer memory is stopped, the first buffering control circuit restarts the storing of the digital data to the buffer memory when the unused capacity reaches the predetermined value.

3. The CD-ROM decoder according to

claim 1

, wherein the first buffering control circuit compares the first and second count values to determine the unused capacity of the buffer memory.

4. The CD-ROM decoder according to

claim 1

, wherein the digital data of each sector includes a sector address, the CD-ROM decoder further comprising:

a first register for storing a target address of a sector from which to start the storing of the digital data to the buffer memory;

a second register for storing a number of the sectors of the digital data that is to be stored in the buffer memory;

a third register for storing a sector address that is included in the digital data; and

a second buffering control circuit connected to the first, second, and third registers to determine from the target address and the sector address when to start the storing of the digital data to the buffer memory and to determine from the sector number when to end the storing of the digital data to the buffer memory.

5. The CD-ROM decoder according to

claim 4

, wherein the second buffering control circuit includes:

a comparison circuit connected to the first and third register for comparing the target address and the sector address to generate a buffering start signal when the target address and the sector address match; and

a buffer trigger generation circuit connected to the second register and the comparison circuit for determining when to start the storing of the digital data to the buffer memory in response to the buffering start signal.

6. The CD-ROM decoder according to

claim 5

, wherein the second register generates a buffering stop signal when the sector number reaches an initial value, and the buffer trigger generation circuit determines when to end the storing of the digital data to the buffer memory in response to the buffering stop signal.

7. A CD-ROM decoder for temporarily storing in a buffer memory in sector units digital data having a predetermined number of bytes and a predetermined format, processing the digital data by selectively correcting and detecting code errors included in the digital data, and transferring the processed digital data, wherein the digital sector of each sector includes a sector address, the CD-ROM decoder comprising:

a first counter for counting the number of sectors of the digital data temporarily stored in the buffer memory to generate a first count value;

a second counter for counting the number of sectors of the processed digital data transferred from the buffer memory to generate a second count value; and

a first buffering control circuit connected to the first and second counters for deciding an unused capacity of the buffer memory based on the first and second counter values to temporarily stop the storing of the digital data to the buffer memory when the unused capacity is equal to or less than a predetermined value, wherein, after the storing of the digital data to the buffer memory is stopped, the first buffering control circuit restarts the storing of the digital data to the buffer memory when the unused capacity reaches the predetermined value;

a first register for storing a target address of a sector from which to start the storing of the digital data to the buffer memory;

a second register for storing a number of the sectors of the digital data that is to be stored in the buffer memory;

a third register for storing a sector address that is included in the digital data; and

a second buffering control circuit connected to the first, second, and third registers to determine from the target address and the sector address when to start the storing of the digital data to the buffer memory and to determine from the sector number when to end the storing of the digital data to the buffer memory.

8. A method for transferring in sector units digital data having a predetermined number of bytes and a predetermined format with a CD-ROM decoder, wherein the CDROM decoder includes a buffering control circuit, the method comprising the steps of:

counting the number of sectors of the digital data temporarily stored in the buffer memory to generate a first count value;

counting the number of sectors of the processed digital data transferred from the buffer memory to generate a second count value;

deciding an unused capacity of the buffer memory based on the first and second count values with a buffering control circuit; and

stopping the storing of the digital data to the buffer memory with the buffering control circuit when the unused capacity is equal to or less than a predetermined value.