Gain control device for packet signal receiver

• US 20010028275A1
• Filed: 04/04/2001
• Published: 10/11/2001
• Est. Priority Date: 04/04/2000
• Status: Active Grant

• Current Assignee: DENSO Corporation
• Original Assignee: DENSO Corporation
• Inventors: Sasaki, Kunihiko, Matsugatani, Kazuoki
• Granted Patent: US 6,621,345 B2
• Time in Patent Office: Days
• US Class Current: 330/281
• CPC Class Codes: H03G 3/3078 Circuits generating control signals for digitally modulated signals

Abstract

In a gain control device for packet signal receiver, a variable gain amplifier amplifies an input signal with a gain corresponding to a control voltage applied thereto, and a power detector detects output power of the variable gain amplifier. A packet detection circuit detects a packet signal based on the detected output power. A control circuit outputs the control voltage variable with the detected output power, and the control voltage is provided for the amplifier. Thus high-speed gain control is performed immediately after the start of detection of the packet signal. When the elapsed time after the start of detection of the packet signal exceeds a predetermined time, a sample-hold circuit sample-and-holds the control voltage. This control voltage is provided for the amplifier up to the end of reception of the packet signal thereafter. Thus low-speed gain control is performed to provide stable power without distorting the signal wave.

Claims

1. A gain control device comprising:

a variable gain

amplifier for amplifying an input signal with a gain corresponding to a control voltage applied thereto;

a power detector for outputting an output voltage corresponding to an input power or an output power of said variable gain amplifier;

a control circuit for outputting the control voltage based on an output voltage of said power detector for controlling the output power of said variable gain amplifier with respect to a target value;

a packet detection circuit for detecting a packet signal by means of the output voltage from said power detector and outputting a packet detection signal;

a timing circuit for outputting a timing signal after an elapse of a predetermined time after a start of outputting the packet detection signal from said packet detection circuit;

a sample-hold circuit for sampling-and-holding the control voltage from said control circuit in response to the timing signal from said timing circuit; and

a switch circuit for providing the control voltage from said control circuit for said variable gain amplifier until the timing signal is output from said timing circuit, and providing the control voltage held by said sample-hold circuit for said variable gain amplifier in response to outputting of the timing signal.

8. A gain control device as set forth in

claim 1

, wherein the packet signal includes a preamble, and the predetermined time is shorter than the receiving time of the preamble but longer than the time the output power of said variable gain amplifier converges to the target value.

9. A gain control device as set forth in

claim 8

, wherein the preamble includes a preamble portion for gain control, and the predetermined time is shorter than the receiving time of the preamble portion for gain control.

2. A gain control device comprising:

a variable gain amplifier for amplifying an input signal with a gain corresponding to a control voltage applied thereto;

a power detector for outputting an output voltage corresponding to an output power of said variable gain amplifier;

a control circuit for outputting the control voltage based on the output voltage of said power detector for controlling the output power of said variable gain amplifier with respect to a target value;

a packet detection circuit for detecting a packet signal by means of the output voltage of said power detector and outputting a packet detection signal;

a convergence detection circuit for detecting a convergent state in the output voltage of said power detector after the output voltage of said power detector exceeds a predetermined threshold, and outputting a convergence detection signal;

a timing circuit for outputting a timing signal in response to the packet detection signal from said packet detection circuit and the convergence detection signal from said convergence detection circuit;

a sample-hold circuit for sampling-and-holding the control voltage from said control circuit in response to the timing signal from said timing circuit; and

a switch circuit for providing the control voltage from said control circuit for said variable gain amplifier until the timing signal is output from said timing circuit, and providing the control voltage held by said sample-hold circuit for said variable gain amplifier in response to outputting of the timing signal.

3. A gain control device comprising:

a variable gain amplifier for amplifying an input signal with a gain corresponding to a control voltage applied thereto;

a power detector for outputting an output voltage corresponding to an input power or an output power of said variable gain amplifier;

a first control circuit for outputting a first control voltage based on the output voltage of said power detector for controlling the output power of said variable gain amplifier with respect to a target value at high speed;

s second control circuit for outputting a second control voltage based on the output voltage of said power detector for controlling the output power of said variable gain amplifier with respect to the target value at low speed;

a packet detection circuit for detecting a packet signal by means of the output voltage of said power detector and outputting a packet detection signal; and

a circuit means for providing the first control voltage from said first control circuit for said variable gain amplifier during a predetermined time after a start of outputting of the packet detection signal from said packet detection circuit, and providing the second control voltage from said second control circuit for said variable gain amplifier after an elapse of the predetermined time.

4. Again control device as set forth in

claim 3

, wherein said circuit means includes:

a timing circuit for outputting a timing signal after an elapse of the predetermined time after the start of outputting of the packet detection signal from said packet detection circuit; and

a switch circuit for providing the first control voltage from said first control circuit for said variable gain amplifier until the timing signal is output from said timing circuit, and providing the second control voltage from said second control circuit for said variable gain amplifier in response to outputting of the timing signal.

10. A gain control device as set forth in

claim 3

, wherein the packet signal includes a preamble, and the predetermined time is shorter than the receiving time of the preamble but longer than the time the output power of said variable gain amplifier converges to the target value.

11. A gain control device as set forth in

claim 10

, wherein the preamble includes a preamble portion for gain control, and the predetermined time is shorter than the receiving time of the preamble portion for gain control.

12. A gain control device as set forth in

claim 4

, wherein the packet signal includes a preamble, and the predetermined time is shorter than the receiving time of the preamble but longer than the time the output power of said variable gain amplifier converges to the target value.

13. A gain control device as set forth in

claim 12

, wherein the preamble includes a preamble portion for gain control, and the predetermined time is shorter than the receiving time of the preamble portion for gain control.

5. A gain control device comprising:

a variable gain amplifier for amplifying an input signal with a gain corresponding to a control voltage applied thereto;

a power detector for outputting an output voltage corresponding to an output power of said variable gain amplifier;

a first control circuit for outputting a first control voltage based on the output voltage of said power detector for controlling the output power of said variable gain amplifier with respect to a target value at high speed;

a second control circuit for outputting a second control voltage based on the output voltage of said power detector for controlling the output power of said variable gain amplifier with respect to the target value at low speed;

a packet detection circuit for detecting a packet signal by means of the output voltage of said power detector and outputting a packet detection signal;

a convergence detection circuit for detecting a convergent state in the output voltage of said power detector after the output power of said power detector exceeds a predetermined threshold, and outputting a convergence detection signal;

a timing circuit for outputting a timing signal in response to the packet detection signal from said packet detection circuit and the convergence detection signal from said convergence detection circuit; and

a switch circuit for providing the first control voltage from said first control circuit for said variable gain amplifier until the timing signal is output from said timing circuit, and providing the second control voltage from said second control circuit for said variable gain amplifier in response to outputting of the timing signal.

6. A gain control device comprising:

a variable gain amplifier for amplifying an input signal with a gain corresponding to a control voltage applied thereto;

a power detector for outputting an output voltage corresponding to an input power or an output power of said variable gain amplifier;

a control circuit for outputting the control voltage based on the output voltage of said power detector for controlling the output power of said variable gain amplifier with respect to a target value at a speed corresponding to a control constant;

a packet detection circuit for detecting a packet signal by means of the output voltage of said power detector and outputting a packet detection signal; and

a control constant adjustment circuit for adjusting the control constant to a large value during a predetermined time after a start of outputting of the packet detection signal from said packet detection circuit, and to a small value after an elapse of the predetermined time.

14. A gain control device as set forth in

claim 6

, wherein the packet signal includes a preamble, and the predetermined time is shorter than the receiving time of the preamble but longer than the time the output power of said variable gain amplifier converges to the target value.

15. A gain control device as set forth in

claim 14

, wherein the preamble includes a preamble portion for gain control, and the predetermined time is shorter than the receiving time of the preamble portion for gain control.

7. A gain control device comprising:

a variable gain amplifier for amplifying an input signal with a gain corresponding to a control voltage applied thereto;

a power detector for outputting an output voltage corresponding to an output power of said variable gain amplifier;

a control circuit for outputting the control voltage based on the output voltage of said power detector for controlling the output power of said variable gain amplifier with respect to a target value at a speed corresponding to a control constant; and

a control constant adjustment circuit for adjusting the control constant corresponding to the output voltage of said power detector, wherein the control constant is increased as the output voltage of said power detector rises and decreased as the output voltage of said power detector drops.

16. A gain control device comprising:

a variable gain amplifier for amplifying an input signal with a gain corresponding to a control voltage applied thereto;

a power detector for outputting an output voltage corresponding to an input power or an output power of said variable gain amplifier;

a control circuit for outputting the control voltage based on the output voltage of said power detector for controlling the output power of said variable gain amplifier with respect to a target value; and

a circuit means for compensating for the output power of said variable gain amplifier based on the control voltage of said control circuit for stabilizing the output power.

17. A gain control method for a receiver in a packet communication system in which each packet signal includes a preamble at a head and data subsequent to the preamble, the method comprising the steps of:

amplifying a received packet signal with a gain;

detecting an output power of the amplified signal;

generating a control voltage variable with the detected output power; and

controlling the gain based on the control voltage so that the output power approaches a target value.

18. A gain control method for a receiver as set forth in

claim 17

, further comprising the steps of:

detecting a start of the preamble of the packet signal by means of the detected output power;

measuring an elapsed time after a detection of the start of the preamble of the packet signal; and

switching from high-speed gain control to low-speed gain control when the measured elapsed time exceeds a predetermined time.

19. A gain control method for a receiver as set forth in

claim 18

, wherein the switching step comprises the steps of:

sampling-and-holding the control voltage when the measured elapsed time exceeds the predetermined time; and

fixing the gain in the low-speed gain control based on the held control voltage for providing stable output power during a reception of the data of the packet signal.

20. A gain control method for a receiver as set forth in

claim 17

, further comprising the steps of:

detecting the packet signal by means of the detected output power;

detecting a convergent state in the detected output power while the packet signal is detected by the detecting step; and

switching from high-speed gain control to low-speed gain control when the convergent state is detected.

21. A gain control method for a receiver as set forth in

claim 20

, wherein the switching step comprises the steps of:

sampling-and-holding the control voltage when the convergent state is detected; and

fixing the gain in the low-speed gain control based on the held control voltage for providing stable output power during a reception of the data of the packet signal.

22. A gain control method for a receiver as set forth in

claim 17

, further comprising the steps of:

effecting high-speed gain control when the detected output power rises from zero; and

switching from high-speed gain control to low-speed gain control when the detected output power falls to the target value.

23. A gain control method for a receiver as set forth in

claim 17

, further comprising the step of:

compensating for the output power of the amplified signal by the control voltage for stabilizing the output power.