Semiconducting system and production method

• US 20010030366A1
• Filed: 03/07/2001
• Published: 10/18/2001
• Est. Priority Date: 03/08/2000
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Technology Corporation (Renesas Electronics Corporation)
• Inventors: Nakano, Hiroshi, Akahoshi, Haruo, Itabashi, Takeyuki
• Granted Patent: US 6,680,540 B2
• Time in Patent Office: Days
• US Class Current: 257/758
• CPC Class Codes: H01L 21/288 from a liquid, e.g. electrolytic deposition
• CPC Class Codes: H01L 21/2885 using an external electrical current, i.e. electro-deposition
• CPC Class Codes: H01L 21/76807 for dual damascene structures
• CPC Class Codes: H01L 21/76811 involving multiple stacked pre-patterned masks
• CPC Class Codes: H01L 21/76829 characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
• CPC Class Codes: H01L 21/76835 Combinations of two or more different dielectric layers having a low dielectric constant H01L21/76832 takes precedence
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76849 the layer being positioned on top of the main fill metal
• CPC Class Codes: H01L 21/76864 Thermal treatment
• CPC Class Codes: H01L 21/76865 Selective removal of parts of the layer H01L21/76844 takes precedence
• CPC Class Codes: H01L 21/76874 for electroless plating
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The object of the present invention is to prevent rise of resistance due to oxidation of the copper wiring and diffusion of copper.

The above object can be attained by the present invention providing a semiconductor device which contains a wire protective film 1 covering the top of the copper wiring 2 formed in the insulation film and a barrier film surrounding the side and bottom of the copper wiring; wherein the wire protective film and/or barrier film is formed with cobalt alloy film containing (1) cobalt, (2) at least one of chromium, molybdenum, tungsten, rhenium, thallium and phosphorus, and (3) boron, as in the case of other embodiments.

Claims

1. A semiconductor device comprising;

(1) multiple layers of copper wires formed in an insulation film,

(2) a wire protective film covering the top of said copper wire, and

(3) a barrier film surrounding the side and bottom of said copper wiring;

said semiconductor device characterized in that at least one of said wiring protective film and barrier film is formed of cobalt alloy film containing at least one of chromium, molybdenum, tungsten, rhenium, thallium and phosphorus, and boron.

2. A semiconductor device according to

claim 1

characterized in that

multiple layers of copper wires are formed in the insulation film,

a wiring protective film and barrier film are covered with cobalt alloy film containing (1) cobalt, (2) at least one of chromium, molybdenum, tungsten, rhenium, thallium and phosphorus, and (3) boron, and

at least a part of the copper wire on the upper layer is electrically connected with the copper wire on the lower layer through said barrier layer.

3. A semiconductor device according to

claim 1

or

2

characterized in that the insulating film has a dielectric constant of 3 or less.

4. A semiconductor device according to

claim 1

or

2

characterized in that said cobalt alloy film has a preferred thickness of 100 nm or less, and contains to 95 atomic percent cobalt,

1 to 40 atomic percent at least one of chromium, molybdenum, tungsten, rhenium, thallium and phosphorus, and

0.1 to 10 atomic percent boron.

5. A semiconductor device according to

claim 1

or

2

characterized in that

multiple layers of copper wires are formed in the insulation film,

wiring protective film and barrier film are covered with cobalt alloy film containing (1) cobalt, (2) at least one of chromium, molybdenum, tungsten, rhenium, thallium and phosphorus, and (3) boron, and the copper wire on the upper layer is electrically connected with the copper wire on the lower layer through said cobalt alloy.

6. A semiconductor device according to

claim 1

or

2

characterized in that said insulation film serving as etch stop layer is further formed on the surface of said insulation film except where the wire protective film is formed.

7. A semiconductor device according to

claim 1

or

claim 2

characterized in that multiple layers of copper wires are formed in the insulation film, a wiring protective film and barrier film are covered with cobalt alloy film containing (1) cobalt, (2) at least one of chromium, molybdenum, tungsten, rhenium, thallium and phosphorus, and (3) boron, and at least a part of the copper wire on the upper layer is electrically connected with the copper wire on the lower layer through the barrier film.

8. A semiconductor device described in

claim 1

through

claim 7

characterized in that said cobalt alloy does not contain palladium.

9. A semiconductor device production method wherein said semiconductor device comprises;

(1) multiple layers of copper wires formed in the insulation film,

(2) a wire protective film covering the top of said copper wire, and

(3) a barrier film surrounding the side and bottom of said copper wiring,

wherein at least one of said wiring protective film and barrier film is virtually formed of cobalt alloy film containing at least one of chromium, molybdenum, tungsten, rhenium, thallium and phosphorus, and boron made by electroless plating.

10. A semiconductor device production method wherein said semiconductor device comprises;

(1) multiple layers of copper wires formed in the insulation film,

(2) a wire protective film covering the top of said copper wire, and

(3) a barrier film surrounding the side and bottom of said copper wiring;

said semiconductor device production method further characterized in that

it has a step of forming insulation film serving as etch stop layer on the surface of the insulation film where copper wiring is formed, and

said wire protective film and/or barrier film is formed by electroless plating method as cobalt alloy film containing (1) cobalt, (2) at least one of chromium, molybdenum, tungsten, rhenium, thallium and phosphorus, and (3) boron.

11. A semiconductor device production method according to

claim 9

or

10

characterized in that said copper wiring is made by electroless plating.

12. A semiconductor device production method according to

claim 9

or

10

characterized in that said cobalt alloy film has a preferred thickness of 100 nm or less, and contains to 95 atomic percent cobalt,

1 to 40 atomic percent at least one of chromium, molybdenum, tungsten, rhenium, thallium and phosphorus, and

0.1 to 10 atomic percent boron.