Bit interleaving for orthogonal frequency division multiplexing in the transmission of digital signals
First Claim
Patent Images
1. For a receiver receiving “
- n”
substreams of an orthogonal frequency division multiplexed (OFDM) signal containing complex phase-adjusted symbols, each symbol representing “
m”
data bits, a device, comprising;
for each substream, a soft decision quantizer for determining a binary value of each bit represented by each symbol in the substream.
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Abstract
In an orthogonal frequency division multiplexing (OFDM) system which uses an outer Reed-Solomon encoder and interleaver an inner convolutional encoder, after the inner convolutional encoding the data bits are interleaved, and then grouped into symbols, each symbol having “m” bits. After grouping, the symbols are mapped to a complex plane using quadrature amplitude modulation (QAM). Thus, bits, not symbols, are interleaved by the inner interleaver. A receiver performs a soft decision regarding the value of each bit in each complex QAM symbol received.
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Citations
7 Claims
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1. For a receiver receiving “
- n”
substreams of an orthogonal frequency division multiplexed (OFDM) signal containing complex phase-adjusted symbols, each symbol representing “
m”
data bits, a device, comprising;
for each substream, a soft decision quantizer for determining a binary value of each bit represented by each symbol in the substream. - View Dependent Claims (2, 3, 4, 5, 6)
- n”
-
7. For an orthogonal frequency division multiplex (OFDM) signal receiver for receiving complex symbols in the OFDM signal, each symbol representing “
- m”
data bits, a computer logic device comprising;
a computer logic storage device readable by a digital processing system; and
instructions embodied in the logic storage device, the instructions being executable by the digital processing system for performing method steps for undertaking a soft decision regarding a value of each symbol, the method steps comprising;
determining a first set of possible values for each symbol, each value in the first set having a binary value of “
0”
in a predetermined bit;
determining, for each symbol, a magnitude difference between the symbol and each possible value in the first set of possible values; and
determining the smallest magnitude difference an generating a first signal representative thereof.
- m”
Specification