Display device

• US 20010033252A1
• Filed: 04/13/2001
• Published: 10/25/2001
• Est. Priority Date: 04/18/2000
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Osame, Mitsuaki, Koyama, Jun, Yamazaki, Shunpei, Osada, Mai
• Granted Patent: US 7,221,338 B2
• Time in Patent Office: Days
• US Class Current: 345/7
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0866 by means of changes in the pixel supply voltage
• CPC Class Codes: G09G 2310/0251 Precharge or discharge of pixel before applying new pixel voltage
• CPC Class Codes: G09G 2310/0262 The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 2310/0281 Arrangement of scan or data electrode driver circuits at the periphery of a panel not inherent to a split matrix structure
• CPC Class Codes: G09G 2320/029 by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
• CPC Class Codes: G09G 2320/041 Temperature compensation
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2330/028 Generation of voltages supplied to electrode drivers in a matrix display other than LCD
• CPC Class Codes: G09G 3/2022 using sub-frames
• CPC Class Codes: G09G 3/3258 with pixel circuitry controlling the voltage across the light-emitting element
• CPC Class Codes: G09G 3/3266 Details of drivers for scan electrodes
• CPC Class Codes: G09G 3/3291 in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
• CPC Class Codes: H10K 59/00 Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays

Abstract

The present invention is intended to suppress power consumption of an EL display. In accordance with the brightness of an image to be displayed in a pixel portion, the contrast of the image is determined whether to be inverted or not, and the number of bits of the digital video signal to be input into the pixel portion is reduced, and the magnitude of a current to flow through the EL element is allowed to be maintained at a constant level even when a temperature of an EL layer changes by providing the EL display with another EL element to be used for monitoring a temperature.

Claims

1. A display device comprising:

a plurality of pixels, wherein a polarity of a video signal to be input into the plurality of pixels is inverted, thereby resulting in brightness of the plurality of pixels being changed.

2. A display device according to

claim 1

, wherein said display device is a light emitting device.

3. A display device according to

claim 1

, wherein said display device is one selected from the group consisting of a video camera, an image reproduction apparatus, a head mount display, a portable telephone, and a portable information terminal.

4. A display device comprising:

a plurality of pixels; and

a source signal line driver circuit,

wherein said source signal line driver circuit comprises a switching circuit for switching a polarity of an output signal, and

a polarity of a video signal input to said switching circuit is inverted by means of a shift signal to be input into said switching circuit and a resultant signal is then input into said plurality of pixels.

5. A display device according to

claim 4

, wherein:

said switching circuit comprises an inverter, a first analog switch, and a second analog switch,

said video signal input into said switching circuit is input into an input terminal of said first analog switch through said inverter,

said video signal input into said switching circuit is input into an input terminal of said second analog switch,

said shift signal is input into a first control input terminal of said first analog switch and a second control input terminal of said second analog switch,

a signal obtained by inverting a polarity of said shift signal is input into a second control input terminal of said first analog switch and a second control input terminal of said first analog switch, and

signals output from output terminals of said first analog switch and said second analog switch are output from said switching circuit.

6. A display device according to

claim 4

, wherein:

said switching circuit comprises an inverter, a first NAND, a second NAND, and a NOR,

said first NAND is supplied with said video signal through said inverter and said shift signal,

said second NAND is supplied with said video signal and a signal obtained by inverting a polarity of said shift signal,

a signal output from said first NAND and a signal output from said second NAND are input into said NOR, and

a signal output from said NOR is output from said switching circuit.

7. A display device according to

claim 4

, wherein said display device is a light emitting device.

8. A display device according to

claim 4

, wherein said display device is one selected from the group consisting of a video camera, an image reproduction apparatus, a head mount display, a portable telephone, and a portable information terminal.

9. A display device comprising:

a plurality of pixels, each comprising a light emitting element; and

a source signal line driver circuit,

wherein said source signal line driver circuit comprises a shift register, one or more latches, and a switching circuit, and

a polarity of a digital video signal input from said one or more latches into said switching circuit is inverted by means of a shift signal to be input into said switching circuit and a resultant signal is then input into the plurality of pixels.

10. A display device according to

claim 9

, wherein:

said switching circuit comprises an inverter, a first analog switch, and a second analog switch,

said video signal input into said switching circuit is input into an input terminal of said first analog switch through said inverter,

said video signal input into said switching circuit is input into an input terminal of said second analog switch,

said shift signal is input into a first control input terminal of said first analog switch and a second control input terminal of said second analog switch,

a signal obtained by inverting a polarity of said shift signal is input into a second control input terminal of said first analog switch and a second control input terminal of said first analog switch, and

signals output from output terminals of said first analog switch and said second analog switch are output from said switching circuit.

11. A display device according to

claim 9

, wherein:

said switching circuit comprises an inverter, a first NAND, a second NAND, and a NOR,

said first NAND is supplied with said video signal through said inverter and said shift signal,

said second NAND is supplied with said video signal and a signal obtained by inverting a polarity of said shift signal,

a signal output from said first NAND and a signal output from said second NAND are input into said NOR, and

a signal output from said NOR is output from said switching circuit.

12. A display device according to

claim 9

, wherein said display device is a light emitting device.

13. A display device according to

claim 9

, wherein said display device is one selected from the group consisting of a video camera, an image reproduction apparatus, a head mount display, a portable telephone, and a portable information terminal.

14. A display device comprising:

a plurality of pixels, each comprising a light emitting element, and

a source signal line driver circuit,

wherein said source signal line driver circuit comprises a shift register, one or more latches and a switching circuit,

a polarity of a digital video signal input from said one or more latches into said switching circuit is inverted by means of a shift signal to be input into said switching circuit and a resultant signal is then input into the plurality of pixels, and

an average of a time period during which all of the light emitting elements emit light in one frame period is equal to or less than a half of the maximum value of the time period during which all of the light emitting elements emit light in one frame period.

15. A display device according to

claim 14

, wherein:

said switching circuit comprises an inverter, a first analog switch, and a second analog switch,

said video signal input into said switching circuit is input into an input terminal of said first analog switch through said inverter,

said video signal input into said switching circuit is input into an input terminal of said second analog switch,

said shift signal is input into a first control input terminal of said first analog switch and a second control input terminal of said second analog switch,

a signal obtained by inverting a polarity of said shift signal is input into a second control input terminal of said first analog switch and a second control input terminal of said first analog switch, and

signals output from output terminals of said first analog switch and said second analog switch are output from said switching circuit.

16. A display device according to

claim 14

, wherein:

said switching circuit comprises an inverter, a first NAND, a second NAND, and a NOR,

said first NAND is supplied with said video signal through said inverter and said shift signal,

said second NAND is supplied with said video signal and a signal obtained by inverting a polarity of said shift signal,

a signal output from said first NAND and a signal output from said second NAND are input into said NOR, and

a signal output from said NOR is output from said switching circuit.

17. A display device according to

claim 14

, wherein said display device is a light emitting device.

18. A display device according to

claim 14

, wherein said display device is one selected from the group consisting of a video camera, an image reproduction apparatus, a head mount display, a portable telephone, and a portable information terminal.

19. A display device comprising:

a plurality of pixels, and

a source signal line driver circuit,

wherein among a digital video signal to be input into said source signal line driver circuit, only more significant bits are input into said plurality of pixels.

20. A display device according to

claim 19

, wherein said display device is a light emitting device.

21. A display device according to

claim 19

, wherein said display device is one selected from the group consisting of a video camera, an image reproduction apparatus, a head mount display, a portable telephone, and a portable information terminal.

22. A display device comprising:

a pixel portion comprising a plurality of pixels, and

a source signal line driver circuit comprising a shift register, a first latch, a second latch, and a clock signal control circuit,,

wherein a clock signal is input into said shift register through said clock signal control circuit to thereby output a timing signal from said shift register,

a video signal is input into and held at said first latch by said timing signal,

said video signal held at said first latch is input into and held at said second latch by a latch signal,

said video signal input into and held at said second latch is input into said plurality of pixels, and

said clock signal control circuit reduces the number of bits of said digital video signal to be input into and held at said first latch by supplying a constant fixed electrical potential instead of said clock signal to said shift register for a constant period of time.

23. A display device according to

claim 22

, wherein said clock signal control circuit comprises a NAND and an inverter,

a clock signal and a selection signal are input into said NAND, and

a signal output from said NAND is output from said clock signal control circuit through said inverter.

24. A display device according to

claim 22

, wherein said clock signal control circuit comprises a first analog switch, a second analog switch, and an inverter,

a selection signal is input through said inverter into a second control input terminal of said first analog switch and a first control input terminal of said second analog switch,

said selection signal is input into a first control input terminal of said first analog switch and a second control input terminal of said second analog switch,

a clock signal is input into an input terminal of said first analog switch,

a fixed electrical potential is supplied to an input terminal of the second analog switch, and

signals output from output terminals of said first analog switch and said second analog switch are output from said clock signal control circuit.

25. A display device according to

claim 22

, wherein said display device is a light emitting device.

26. A display device according to

claim 22

, wherein said display device is one selected from the group consisting of a video camera, an image reproduction apparatus, a head mount display, a portable telephone, and a portable information terminal.

27. A display device comprising:

a pixel portion comprising a plurality of pixels, and

a source signal line driver circuit comprising a shift register, a first latch, a second latch, and a timing signal control circuit,

wherein a timing signal output from said shift register is input into said first latch through said timing signal control circuit,

a video signal is input into and held at said first latch by said timing signal input into said first latch,

said video signal held at said first latch is input into and held at said second latch by a latch signal,

said video signal input into and held at said second latch is input into said plurality of pixels, and

said timing signal control circuit reduces the number of bits of said video signal to be input into and held at said first latch by supplying to said first latch a constant fixed electrical potential instead of said timing signal output from said shift register for a constant period of time.

28. A display device according to

claim 27

, wherein said timing signal control circuit comprises a NAND and an inverter,

a timing signal and a selection signal are input into said NAND, and

a signal output from said NAND is output from said timing signal control circuit through said inverter.

29. A display device according to

claim 27

, wherein said timing signal control circuit comprises a first analog switch, a second analog switch, and an inverter,

a selection signal is input through said inverter into a second control input terminal of said first analog switch and a first control input terminal of said second analog switch, the selection signal is input into a first control input terminal of said first analog switch and a second control input terminal of said second analog switch,

said timing signal is input into an input terminal of said first analog switch,

a fixed electrical potential is supplied to an input terminal of said second analog switch, and

signals output from output terminals of said first analog switch and said second analog switch are output from said timing signal control circuit.

30. A display device according to

claim 27

, wherein said display device is a light emitting device.

31. A display device according to

claim 27

, wherein said display device is one selected from the group consisting of a video camera, an image reproduction apparatus, a head mount display, a portable telephone, and a portable information terminal.

32. A display device comprising:

a pixel portion comprising a plurality of pixels, and

a source signal line driver circuit comprising a shift register, a first latch, a second latch, and a start pulse signal control circuit,

wherein a start pulse signal is input into said shift register through said start pulse signal control circuit to thereby output a timing signal from said shift register,

a video signal is input into and held at said first latch by the timing signal,

said video signal held at said first latch is input into and held at said second latch by a latch signal,

said video signal input into and held at said second latch is input into said plurality of pixels, and

said start pulse signal control circuit reduces the number of bits of said video signal to be input into and held at said first latch by supplying to said shift register a constant fixed electrical potential instead of said start pulse for a constant period of time.

33. A display device according to

claim 32

, wherein said start pulse signal control circuit comprises a NAND and an inverter,

a start pulse signal and a selection signal are input into said NAND, and

a signal output from said NAND is output from the start pulse signal control circuit through said inverter.

34. A display device according to

claim 32

, wherein said start pulse signal control circuit comprises a first analog switch, a second analog switch, and an inverter,

a selection signal is input through said inverter into a second control input terminal of said first analog switch and a first control input terminal of said second analog switch,

said selection signal is input into a first control input terminal of said first analog switch and a second control input terminal of said second analog switch,

a start pulse signal is input into an input terminal of said first analog switch,

a fixed electrical potential is supplied to an input terminal of said second analog switch, and

signals output from output terminals of said first analog switch and said second analog switch are output from said start pulse signal control circuit.

35. A display device according to

claim 32

, wherein said display device is a light emitting device.

36. A display device according to

claim 32

, wherein said display device is one selected from the group consisting of a video camera, an image reproduction apparatus, a head mount display, a portable telephone, and a portable information terminal.

37. A display device comprising:

a plurality of pixels comprising a plurality of light emitting elements, and

a monitoring light emitting element,

wherein a variation in a current to flow through said plurality of light emitting elements is reduced by means of temperature characteristics of said monitoring light emitting element.

38. A display device according to

claim 37

, wherein said display device is a light emitting device.

39. A display device according to

claim 37

, wherein said display device is one selected from the group consisting of a video camera, an image reproduction apparatus, a head mount display, a portable telephone, and a portable information terminal.

40. A display device comprising:

a pixel portion comprising a plurality of pixels, each pixels having a thin film transistor and a light emitting element;

a power source line;

a buffer amplifier;

a monitoring light emitting element; and

a constant current source,

wherein each of said monitoring light emitting element and said light emitting element comprises a first electrode, a second electrode, and an organic compound layer interposed therebetween,

said first electrode of said monitoring light emitting element is connected to said constant current source, and connected to a non-inverted input terminal of said buffer amplifier,

an output terminal of said buffer amplifier is connected to said power source line, and

an electrical potential of said power source line is applied to said first electrode of said light emitting element through said thin film transistor.

41. A display device according to

claim 40

, wherein said display device is a light emitting device.

42. A display device according to

claim 40

, wherein said display device is one selected from the group consisting of a video camera, an image reproduction apparatus, a head mount display, a portable telephone, and a portable information terminal.

43. A display device comprising:

a pixel portion comprising a plurality of pixels, each pixels having a thin film transistor and a light emitting element;

a power source line;

a buffer amplifier;

a monitoring light emitting element;

a constant current source; and

an adding circuit,

wherein each of said monitoring light emitting element and said light emitting element comprises a first electrode, a second electrode, and an organic compound layer interposed therebetween,

said first electrode of said monitoring light emitting element is connected to said constant current source, and is connected to a non-inverted input terminal of the buffer amplifier,

an output terminal of said buffer amplifier is connected to an input terminal of said adding circuit,

an output terminal of said adding circuit is connected to said power source line,

a constant potential difference is maintained between said input terminal and said output terminal of said adding circuit, and

an electrical potential of said power source line is applied to said first electrode of said light emitting element through said thin film transistor.

44. A display device according to

claim 43

, wherein said display device is a light emitting device.

45. A display device according to

claim 43

, wherein said display device is one selected from the group consisting of a video camera, an image reproduction apparatus, a head mount display, a portable telephone, and a portable information terminal.