Apparatus and method for performing speculative cache directory tag updates

• US 20010034815A1
• Filed: 02/28/2001
• Published: 10/25/2001
• Est. Priority Date: 04/25/2000
• Status: Active Grant

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Huang, Terry C., Gostin, Gary B., Yu, Henry, Dugan, Michael K., McAllister, Curtis R., Heap, Mark A.
• Granted Patent: US 6,564,306 B2
• Time in Patent Office: Days
• US Class Current: 711/118
• CPC Class Codes: G06F 11/1012 using codes or arrangements adapted for a specific type of error G06F11/1048 takes precedence
• CPC Class Codes: G06F 12/0817 using directory methods
• CPC Class Codes: G06F 2212/507 using speculative control

Abstract

An apparatus and method for performing speculative directory cache tag updates for read accesses to memory is herein disclosed. A control unit for performing tag updates is coupled between the memory controller and the memory bank in a multiprocessor system that employs a directory-based coherency protocol. The control unit transmits data read from the memory bank to the memory controller while calculating the updated tag that it then writes back to the memory bank. In this manner, the memory bank busy time and memory bus traffic are reduced thereby improving the overall performance of a memory access.

Claims

1. A method for operating a computer system, the method comprising the steps of:

providing a memory storage device, a first control unit, and a memory control unit, the first control unit coupled to the first control unit and a memory control unit, the memory storage device including a first word having tag data;

transmitting the first word from the memory storage device to the first control unit;

transferring the first word from the first control unit to the memory control unit;

generating in the first control unit an updated first word; and

writing the updated first word back to the memory storage device from the first control unit.

2. The method of

claim 1

, comprising the steps of:

before the transmitting step, obtaining sole access to the memory storage device; and

after the writing step, releasing access to the memory storage device.

3. The method of

claim 1

,

the generating step comprising the steps of:

calculating an updated tag data; and

generating the updated first word based on the updated tag data.

4. The method of

claim 1

, comprising the step of:

providing in the first word an error correction code; and

the generating step comprising the steps of;

calculating an updated tag data;

calculating an updated error correction code; and

forming an updated word using the updated tag data and the updated error correction code.

5. The method of

claim 1

,

providing in the memory storage device a second word not having tag data;

transmitting the second word from the memory storage device to the first control unit;

transferring the second word from the first control unit to the memory control unit; and

writing back the second word from the first control unit to the memory storage device without altering the second word.

6. A computer system, comprising:

a memory storage device including a plurality of words, a first word having a tag portion; and

a first control unit, coupled to the memory storage device, including;

a first logic unit to determine when the first word is read from the memory storage device;

a second logic unit that updates the tag portion of the first word when the first logic unit determines that the first word is read from the memory storage device;

a third logic unit that generates an updated first word based on the updated tag portion; and

a fourth logic unit that writes the updated first word back to the memory storage device.

7. The apparatus of

claim 6

,

the first control unit including a fifth logic unit that transmits a second word received by the first control unit to the memory storage device.

8. The apparatus of

claim 6

,

the memory storage device including a second word not having a tag portion;

the first control unit including;

a sixth logic unit that writes the second word back to the memory storage device unaltered.

9. The apparatus of

claim 6

,

the first word having a code portion;

and

the first control unit including a seventh logic unit that updates the code portion;

wherein the third logic unit generates an updated first word based on the updated tag and code portions.