ATM switching system and cell control method

• US 20010036156A1
• Filed: 06/19/2001
• Published: 11/01/2001
• Est. Priority Date: 08/25/1993
• Status: Abandoned Application

• Current Assignee: Manabu Okamoto, Morihito Miyagi, Takahiro Kozaki
• Original Assignee: Manabu Okamoto, Morihito Miyagi, Takahiro Kozaki
• Inventors: Kozaki, Takahiro, Okamoto, Manabu, Miyagi, Morihito
• Application Number:
  US09/883,191
• Publication Number:
  US 20010036156A1
• Time in Patent Office: Days
• US Class Current: 370/230
• CPC Class Codes: H04L 12/5601 Transfer mode dependent, e.g. ATM
• CPC Class Codes: H04L 2012/563 Signalling, e.g. protocols, reference model
• CPC Class Codes: H04L 2012/5647 Cell loss
• CPC Class Codes: H04L 2012/5648 Packet discarding, e.g. EPD, PTD
• CPC Class Codes: H04L 2012/5658 using the AAL5
• CPC Class Codes: H04L 2012/5681 Buffer or queue management
• CPC Class Codes: H04L 49/103 using a shared central buffer; using a shared memory
• CPC Class Codes: H04L 49/108 using shared central buffer
• CPC Class Codes: H04L 49/255 Control mechanisms for ATM switching fabrics
• CPC Class Codes: H04L 49/3009 Header conversion, routing tables or routing tags
• CPC Class Codes: H04L 49/3027 Output queuing
• CPC Class Codes: H04L 49/3081 ATM peripheral units, e.g. policing, insertion or extraction
• CPC Class Codes: H04L 49/309 Header conversion, routing tables or routing tags
• CPC Class Codes: H04L 49/505 Corrective measures

Abstract

An ATM switching system includes PVC allocation circuits 13-i corresponding to output queues 14-i is disclosed. At the time of arrival of the leading cell of each burst data, if the output line has a room, the PVC of the burst data is stored as information for admission and identification. The subsequently-arriving cells having the same PVC identification information as the stored identification information are “input to an output buffer, and the cells of the remaining burst data are all discarded. Even when a plurality of burst data compete for the same output line, the fact that all the cells other than the first-arriving admitted burst data are discarded prevents the cells from being input other than within a predetermined bandwidth and localizes the burst data affected by the cell discarding due to output queue overflow.

Claims

1. In an ATM switching system including a plurality of input lines and a plurality of output lines, a cell control method for transferring fixed-length packets (cells) input from each input line to an output line specified according to the header information of the respective cells, said method comprising the steps of:

deciding whether new burst data is to be Admitted or not in accordance with the amount of other burst data admitted to one of the output lines to which the leading cell of the new burst data is to be output when the leading cell of said new burst data arrives at the switching system; and

admitting only the subsequent cells of at least one specified burst data that have been admitted at the time of arrival of the leading cell thereof respectively, said burst data being included in a plurality of burst data and directed to the same output line in temporally overlapped fashion, the cells of the remaining burst data being discarded.

2. A cell control method according to

claim 1

, further comprising the steps of:

registering part of the header information of the leading cell of the burst data admitted for transfer to an output line as identification information of the data at the time of arrival of said leading cell of said burst data; and

deciding whether the subsequently-arriving cells of burst data are to be admitted or discarded according to whether the header of said cells contains the burst identification information in registration.

3. A cell control method according to

claim 2

, further comprising the step of:

storing the bandwidth utilization rate for each output line and deciding whether given burst data is to be admitted according to the bandwidth utilization fate of the output line to which the leading cell of the particular burst data is to be output at the time of arrival of said leading cell.

4. A cell control method according to

claim 2

, further comprising the step of:

at least a part of selected one of the VCI (Virtual Channel Identifier), the VPI (Virtual Path Identifier) and a combined value of VCI and VPI contained in the header of the leading cell of burst data is stored as information for identifying burst data to be admitted.

5. A cell control method according to

claim 3

, further comprising the step of:

at least a part of selected one of the VCI (Virtual Channel Identifier), the VPI (Virtual Path Identifier) and a combined value of VCI and VPI contained in the header of the leading cell of burst data is stored as information for identifying burst data to be admitted.

6. An ATM switching system comprising a plurality of input lines and a plurality of output lines for transferring fixed-length packets (cells) input from each input line to an output line specified in accordance with the header information of the respective cells, comprising:

buffer memory means for forming an output queue of cells corresponding to each output line;

register means for storing identification information of the burst data admitted for each output queue; and

control means for deciding whether the output queue in which the leading cell of burst data is to be accumulated satisfies a predetermined condition when said leading cell is input thereto, and when the predetermined condition is satisfied, accumulating said leading cell in said output queue, storing at least part of the header information of said leading cell in said register means, said leading cell being discarded with the subsequently-arriving non-leading cells being discarded or accumulated in said output queue according to the result of comparison between the header information of said cells and the information stored in said register means when said predetermined condition is not-.satisfied.

7. An ATM switching system according to

claim 6

, wherein said control means deletes the information corresponding to the header information of the last cell of burst data from said register when said last cell arrives.

8. An ATM switching system according to

claim 6

, wherein said control means decides the manner in which the leading cell of given burst data is processed and whether information storage in said register means is required in accordance with whether the output queue for accumulating said cells is utilized for storing the cells of other burst data when the leading cell of said ‘

given burst data is input.

9. An ATM switching system according to

claim 7

, wherein said control means decides the manner in which the leading cell of given burst data is processed and information storage in said register means are required in accordance with whether the output queue for accumulating said cells is utilized for storing the cells of other burst data when the leading cell of said particular burst data is input.

10. An ATM switching system according to

claim 6

, wherein said buffer memory means forms a plurality of output queues for at least one output line, and when the leading cell of burst data to be sent out to any of said output lines is input thereto, said control means selects an output queue not used for storing the cells of other burst cells, processes said leading cell appropriately and registers the information in said register means.

11. An ATM switching system comprising a plurality of input highways and a plurality of output highways for distributing the fixed-length packets (cells) input from said input highways among the output highways in accordance with the header information of the respective cells, said system further comprising:

buffer memory means for forming at least one cell output queue for each output highway;

multiplexer means for converting the parallel cells arriving from said input highways into a serial stream of cells; and

control means for performing the operation of writing said cells output from said multiplexer means into said buffer memory means and the operation of reading the cells from said buffer memory means; and

demultiplexer means for distributing the cells read from said buffer memory means among said output highways;

wherein said control means includes first register means for indicating the used or unused state of burst data for each output queue and second register means for storing the identification information of the burst data in use for each output queue;

wherein in the case where the first register means corresponding to the output queue for accumulating the newly-arriving leading cell of burst data is occupied by other burst data at the time of arrival of said leading cell, said leading cell is discarded, while in the case where said first register means indicates the unused state, the first register means is rewritten as a used state, the identification information of said burst data is registered in the corresponding second register means, and said leading cell is accumulated in the output queue in said buffer memory means; and

the header information of the arriving cells other than the leading cell of the burst data is compared with the burst data identification information stored in said second register corresponding to the output queue for accumulating said cells, and said cells are discarded or accumulated in the output queue in accordance with the result of comparison.

12. An ATM switching system according to

claim 11

, wherein in the case where said accumulated cell is the last cell of burst data, said control means rewrites the first register means as a unused state and deletes the identification information of the second register at the same time.

13. An ATM switching system according to

claim 11

, wherein said control means discards or accumulates the cells other than the leading cell of burst data in the output queue of the buffer memory in accordance with the state of the first register means corresponding to the output queue for accumulating said cell and the correspondence between the burst data identification information stored in the second register and the header information of said cell at the time of arrival of said cells, said first register means being rewritten as an unused state in the case where the accumulated cell is the last cell of the burst data.

14. In an ATM switching system including a plurality of input lines and a plurality of output lines for transferring fixed-length packets (cells) from each input line to an output line specified in accordance with the header information of the respective cells, a cell control method comprising the steps of:

deciding whether a new burst data in a specified switching mode of the switching system is to be admitted or not in accordance with the amount of other burst data in said specific switching mode which have been admitted for transmission to one of said output lines, when the leading cell of said new burst data arrives; and

admitting only the cells of one or a plurality of burst data that have been admitted at the time of arrival of the leading cells thereof in the case where a plurality of burst data in the specific switching mode directed to the same output line from a plurality of different input lines arrive in temporally overlapped fashion, and discarding the cells of the other burst data.

15. A cell control method according to

claim 14

, further comprising the step of admitting the cells of the data other than the burst data in said specific switching mode to the switching system and outputting said cells to the output line specified according to the header information of the respective cells.

16. A cell control method according to

claim 15

, further comprising the steps of:

registering a part of the header information of the leading cell of burst data admitted to the output line as the information for identifying the admitted burst data at the time of arrival of the leading cell of the burst data in said specified switching mode, and deciding whether each of the subsequently arriving cell is to be admitted or discarded according to whether the header of each of said subsequently arriving cells of the burst data in said specified switching mode contains said burst identification information in registration.

17. A cell control method according to

claim 15

, further comprising the step of storing the bandwidth utilization rate of each output line and deciding whether a given burst data is to be admitted or not in accordance with the bandwidth utilization rate of said output line at the time of arrival of the leading cell of the burst data to be output to said output line.

18. A cell control method according to

claim 15

, further comprising the step of storing selected one of the VCI (Virtual Channel Identifier), the VPI (Virtual Path Identifier) and at least a part of a combined value of the VCI and VPI contained in the header of the leading cell of the burst data as the information for identifying said admitted burst data.