Path search circuit dividing a received signal into a plurality of FFT windows to reduce arithmetic operation processes for cross-correlation coefficients

• US 20010036221A1
• Filed: 04/23/2001
• Published: 11/01/2001
• Est. Priority Date: 04/27/2000
• Status: Active Grant

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Sato, Toshifumi
• Granted Patent: US 6,778,591 B2
• Time in Patent Office: Days
• US Class Current: 375/147
• CPC Class Codes: H04B 1/70754 Setting of search window, i.e. range of code offsets to be searched H04B1/70758 takes precedence
• CPC Class Codes: H04B 1/70757 with increased resolution, i.e. higher than half a chip H04B1/70758 takes precedence
• CPC Class Codes: H04B 1/708 Parallel implementation
• CPC Class Codes: H04B 1/7113 Determination of path profile
• CPC Class Codes: H04B 1/7117 Selection, re-selection, allocation or re-allocation of paths to fingers, e.g. timing offset control of allocated fingers
• CPC Class Codes: H04B 2201/70707 Efficiency-related aspects

Abstract

A path search circuit wherein a received signal is divided with a plurality of FFT windows to reduce arithmetic operation processing for cross-correlation coefficients is disclosed. An interleave unit divides received signal rxd into two rxd1, rxd2 at one-chip intervals, and the two sequences are picked out with overlapped FFT windows and FFT is performed for the picked out sequences by two FFT units. A cross power spectrum calculating unit determines cross power spectra between the received signal after the FFT and a reference signal stored in a reference signal storage unit. An output of the cross power spectrum calculating unit is averaged for each FFT window by an averaging unit, and IFFT is performed for the averaged cross power spectra by an IFFT unit. The two resulting cross-correlation coefficients are rearranged in order of time by a deinterleave unit and interpolated to an accuracy necessary for detection of a path timing by an interpolation unit.

Claims

1. A path search circuit for a receiver which uses a DS-CDMA communication method, for detecting a path timing, which is a timing at which spreading is performed on the transmission side, from a received radio signal, said circuit comprising:

a radio receiving unit for filtering and frequency converting the received radio signal to convert the received radio signal into a baseband signal;

an A/D converter for sampling the baseband signal at a sampling rate equal to N times a chip rate to convert the baseband signal into a digital signal;

a cross-correlation coefficient calculating unit including interleave means for rearranging the baseband signal digitized by said A/D converter into N sequences sampled at chip intervals, N fast Fourier transform means for obtaining the N received signal sequences rearranged by said interleave means with mutually overlapped FFT windows of a predetermined time length and performing fast Fourier transform for the picked out received signal sequences, reference signal storage means for storing a signal sequence produced by picking out a predetermined code sequence with FFT windows of a fixed time length and fast Fourier transforming the picked out code sequence as a reference signal, N cross power spectrum calculation means for determining the product of the received signal fast Fourier transformed by said fast Fourier transform means and a complex conjugate number of the reference signal stored in said reference signal storage means for each of the FFT windows to determine cross power spectra between the received signal and the predetermined code sequence, N cross power spectrum averaging means for averaging the cross power spectra for the respective FFT windows, N inverse fast Fourier transform means for inverse fast Fourier transforming the N cross power spectra averaged by said cross power spectrum averaging means to convert the cross power spectra into N cross-correlation coefficients and outputting the N cross-correlation coefficients, and deinterleave means for rearranging the N cross-correlation coefficients output from said respective inverse fast Fourier transform means in order of time to produce and output a single cross-correlation coefficient;

a cross-correlation coefficient averaging unit for averaging the cross-correlation coefficients output from said cross-correlation calculating unit over a fixed period of time; and

a peak detecting unit for detecting one or a plurality of peaks from the cross-correlation coefficient averaged by said cross-correlation coefficient averaging unit and outputting a timing at which the peak or each of the peaks is obtained as a path timing.

2. A path search circuit according to

claim 1

, wherein the value N is an integer lowest among values which satisfy relationship:

N≧

radio bandwidth/chip rate.

3. A path search circuit according to

claim 2

, further comprising interpolation means for oversampling the N cross-correlation functions output from said deinterleave means as sequences of a time interval equal to 1/N the chip interval to M times, where M is a positive integer, and passing the oversampled cross-correlation coefficients through a low-pass filter to produce cross-correlation coefficients oversampled to N×

M times the chip rate and then outputting the produced cross-correlation coefficients.

4. A path search circuit for a receiver which uses a DS-CDMA communication method for detecting a path timing, which is a timing at which spreading is performed on the transmission side, from a received radio signal, comprising:

a radio receiving unit for filtering and frequency converting the received radio signal to convert the received radio signal into a baseband signal;

an A/D converter for sampling the baseband signal at a sampling rate equal to N times a chip rate to convert the baseband signal into a digital signal;

a cross-correlation coefficient calculating unit including interleave means for rearranging the baseband signal digitized by said A/D converter into N sequences sampled at chip intervals, N fast Fourier transform means for picking out the N received signal sequences rearranged by said interleave means with mutually overlapped FFT windows of a predetermined time length and performing fast Fourier transform for the picked out received signal sequences, reference signal storage means for storing a signal sequence produced by picking out a predetermined code sequence with FFT windows of a fixed time length and fast Fourier transforming the picked out code sequence as a reference signal, N cross power spectrum calculation means for determining the product of the received signal fast Fourier transformed by said fast Fourier transform means and a complex conjugate number of the reference signal stored in said reference signal storage means for each of the FFT windows to determine cross power spectra between the received signal and the predetermined code sequence, N cross power spectrum averaging means for averaging the cross power spectra for the respective FFT windows, N first cross power spectrum conversion means for applying reflection by N times and phase rotation in the frequency domain to the N cross power spectra averaged by said cross power spectrum averaging means and having a bandwidth equal to the chip rate to convert the N cross power spectra into a single cross power spectrum having a bandwidth equal to N times the chip rate, cross power spectrum addition means for adding the N cross power spectra converted by each of said first cross power spectrum conversion means, second cross power spectrum conversion means for adding a number of “

0”

s equal to N (M−

1) times the chip rate to a high frequency of the cross power spectrum obtained by said addition means, where M is a positive integer, and inverse fast Fourier transform means for inverse fast Fourier transforming the cross power spectrum obtained by said second power spectrum conversion means and having a bandwidth increased to M times to determine a cross-correlation coefficient;

a cross-correlation coefficient averaging unit for averaging the cross-correlation coefficients output from said cross-correlation calculating unit over a fixed period of time; and

a peak detecting unit for detecting one or a plurality of peaks from the cross-correlation coefficient averaged by said cross-correlation coefficient averaging unit and outputting a timing at which the peak or each of the peaks is obtained as a path timing.

5. A path search circuit for a receiver which uses a DS-CDMA communication method for detecting a path timing, which is a timing at which spreading is performed on the transmission side, for each of a plurality of channels from a received radio signal, comprising:

a radio receiving unit for filtering and frequency converting the received radio signal to convert the received radio signal into a baseband signal;

an A/D converter for sampling the baseband signal at a sampling rate equal to N times a chip rate to convert the baseband signal into a digital signal;

a cross-correlation coefficient calculating unit including interleave means for rearranging the baseband signal digitized by said A/D converter into N sequences sampled at chip intervals, N fast Fourier transform means for picking out the N received signal sequences rearranged by said interleave means with mutually overlapped FFT windows of a predetermined time length and performing fast Fourier transform for the picked out received signal sequences, reference signal storage means provided for each channel for storing a signal sequence produced by picking out a predetermined code sequence with FFT windows of a fixed time length and fast Fourier transforming the picked out code sequence as a reference signal, N cross power spectrum calculation means provided for each channel for determining the product of the received signal fast Fourier transformed by said fast Fourier transform means and a complex conjugate number of the reference signal stored in said reference signal storage means for each of the FFT windows to determine cross power spectra between the received signal and the predetermined code sequence, N cross power spectrum averaging means provided for each channel for averaging the cross power spectra for the respective FFT windows, N inverse fast Fourier transform means provided for each channel for inverse fast Fourier transforming the N cross power spectra averaged by said cross power spectrum averaging means to convert the cross power spectra into N cross-correlation coefficients and outputting the N cross-correlation coefficients, and deinterleave means provided for each channel for rearranging the N cross-correlation coefficients output from said respective inverse fast Fourier transform means in order of time to produce and output a single cross-correlation coefficient;

a cross-correlation coefficient averaging unit for averaging the cross-correlation coefficients output from said cross-correlation calculating unit over a fixed period of time; and

a peak detecting unit for detecting one or a plurality of peaks for each channel from the cross-correlation coefficient averaged by said cross-correlation coefficient averaging unit and outputting a timing at which the peak or each of the peaks is obtained as a path timing.

6. A path search circuit according to

claim 5

, wherein the value N is an integer lowest among values which satisfy relationship N≧

radio bandwidth/chip rate.

7. A path search circuit according to

claim 5

, further comprising interpolation means for oversampling the N cross-correlation functions output from said deinterleave means as sequences of a time interval equal to 1/N the chip interval to M times, where M is a positive integer, and passing the oversampled cross-correlation coefficients through a low-pass filter to produce cross-correlation coefficients oversampled to N×

M times the chip rate and then outputting the produced cross-correlation coefficients.