DISPLAY SYSTEM WITH MULTIPLEXED PIXELS
First Claim
Patent Images
1. A display matrix comprising:
- a plurality of display elements, each display element including a pixel, and a display circuit electrically connected to the pixel and at least partially positioned outside of a footprint of the pixel, the display circuit including a plurality of memory cells, and a selector continuously electrically connected to more than one of the plurality of memory cells, the selector outputting to the pixel data from one memory cell at a time.
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Abstract
A display matrix is provided comprising a plurality of display elements, each display element including a pixel, and a display circuit electrically connected to the pixel and at least partially positioned outside of a footprint of the pixel, the display circuit including a plurality of memory cells, and a selector continuously electrically connected to more than one of the plurality of memory cells, the selector outputting to the pixel data from one memory cell at a time.
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Citations
29 Claims
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1. A display matrix comprising:
a plurality of display elements, each display element including a pixel, and a display circuit electrically connected to the pixel and at least partially positioned outside of a footprint of the pixel, the display circuit including a plurality of memory cells, and a selector continuously electrically connected to more than one of the plurality of memory cells, the selector outputting to the pixel data from one memory cell at a time. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A display matrix comprising:
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a first display element including a first pixel, and a first display circuit including a plurality of memory cells electrically connected to the first pixel;
a second display element including a second pixel, and a second display circuit including a plurality of memory cells electrically connected to the second pixel, the second display circuit being at least partially positioned within a footprint of the second pixel and within a footprint of the first pixel. - View Dependent Claims (12, 13)
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14. A virtual image display system comprising:
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a display matrix including a plurality of display elements, each display element including a pixel, and a display circuit electrically connected to the pixel and at least partially positioned outside of a footprint of the pixel, the display circuit including a plurality of memory cells, and a selector continuously electrically connected to more than one of the plurality of memory cells, the selector outputting to the pixel data from one memory cell at a time;
peripheral control circuits for controlling read and write operations to the memory cells; and
one or more magnification optics for magnifying the sub-images formed by the display matrix. - View Dependent Claims (15, 16, 17, 18)
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19. A virtual image display system comprising:
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a display matrix comprising a first display element including a first pixel, and a first display circuit including a plurality of memory cells electrically connected to the first pixel, a second display element including a second pixel, and a second display circuit including a plurality of memory cells electrically connected to the second pixel, the second display circuit being at least partially positioned within a footprint of the second pixel and within a footprint of the first pixel;
peripheral control circuits for controlling read and write operations to the memory cells; and
one or more magnification optics for magnifying the sub-images formed by the display matrix. - View Dependent Claims (20, 21, 22)
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23. A method for reducing the number of address lines in a pixel-based display system, the method comprisng:
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electrically connecting a plurality of display circuits to a plurality of pixels each having a footprint, the plurality of display circuits controlling the operation of the plurality of pixels;
positioning the plurality of display circuits relative to the plurality of pixels such that at least a portion of the plurality of display circuits are not entirely positioned within the footprint of a single pixel; and
connecting data lines to the plurality of data circuits to read and write data to the plurality of data circuits. - View Dependent Claims (24, 25, 26, 27, 28, 29)
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Specification