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Liquid crystal display device and fabrication method thereof

  • US 20010040648A1
  • Filed: 05/10/2001
  • Published: 11/15/2001
  • Est. Priority Date: 05/12/2000
  • Status: Active Grant
First Claim
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1. A liquid crystal display device comprising:

  • a first insulating substrate and a second substrate being disposed so that respective main surfaces thereof are opposite to one another;

    a liquid crystal layer being interposed between the first and second insulating substrates;

    gate wiring lines being formed on the first insulating substrate and transmitting scanning signals;

    a gate insulating film being composed of the first insulating substrate and the gate wiring lines;

    drain wiring lines being composed of metal films formed on the gate insulating film and transmitting video signals;

    semiconductor layers being formed on the gate insulating film and at least under the drain wiring lines;

    thin film transistor sections, each of which has a semiconductor channel layer composed of a part of the semiconductor layer located at least over a part of the gate wiring layer, a drain electrode composed of a part of the drain wiring line located on the semiconductor channel layer and a semiconductor contacting layer formed of a part of the semiconductor layer being contacted with the part of the drain wiring lines, a source electrode composed of another metal film formed on the semiconductor channel layer to be spaced from and opposite to the drain electrode and another semiconductor contacting layer formed of another part of the semiconductor layer being contacted with a lower surface of the another metal film, and a protective film covering the drain wiring lines, the source electrode, and the drain electrode; and

    pixel electrode sections, each of which has a pixel electrode being contacted with the source electrodes, wherein a planar pattern of each of the semiconductor layers is broader than those of the metal layers of the drain wiring layer, the source electrodes, and the drain electrodes formed thereon, and a planar pattern of each of the semiconductor layers other than the semiconductor contacting layers formed therein is broader than those of the semiconductor contacting layers.

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