Liquid crystal display panel

• US 20010040665A1
• Filed: 02/26/2001
• Published: 11/15/2001
• Est. Priority Date: 02/25/2000
• Status: Active Grant

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Philips LCD Company Limited (LG Display Co., Ltd.)
• Inventors: Ahn, Byung Chul
• Granted Patent: US 6,774,975 B2
• Time in Patent Office: Days
• US Class Current: 349/156
• CPC Class Codes: G02F 1/133512 Light shielding layers, e.g. black matrix G02F1/136209 takes precedence
• CPC Class Codes: G02F 1/13394 spacers regularly patterned on the cell subtrate, e.g. walls, pillars G02F1/133377 takes precedence
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence

Abstract

A liquid crystal display panel provided with a lower substrate and an upper substrate spaced from and facing to each other to have a gap therebetween. In the liquid crystal panel, a liquid crystal layer is positioned between the first and second substrate. The lower substrate has a thin film transistor formed thereon and a patterned spacer formed on the thin film transistor and supporting the second substrate. The thin film transistor has a semiconductor pattern, a source electrode and drain electrode. A portion of the semiconductor pattern is exposed between the source electrode and the drain electrode. The patterned spacer has an insulating layer on the bottom which is in contact with the exposed portion of the semiconductor pattern.

Claims

1. A liquid crystal display comprising:

a first substrate ant a second substrate spaced from and facing to each other to have a gap therebetween;

a liquid crystal layer between the first and second substrate;

a thin film transistor formed on the first substrate, the thin film transistor having a semiconductor pattern, a source electrode and drain electrode, a portion of the semiconductor pattern being exposed between the source electrode and the drain electrode; and

a patterned spacer formed on the thin film transistor and supporting the second substrate, the patterned spacer having an insulating layer on the bottom which is in contact with the exposed portion or the semiconductor pattern.

2. The liquid crystal display as claimed in

claim 1

, the first substrate and the second substrate including a first alignment layer and a second alignment layer respectively, a part of the first alignment layer being in contact with the second alignment layer on a top surface of the patterned spacer.

3. The liquid crystal display as claimed in

claim 1

, the patterned pacer having a nontransparent layer on the organic layer, the nontransparent layer being wider than the exposed portion or the semiconductor pattern.

4. The liquid crystal display as claimed in

claim 1

, the liquid crystal display further including a data line formed on the first substrate and electrically coupled to one of the source and drain electrodes, the organic layer of the patterned spacer extending over the data line.