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Partially removable spacer with salicide formation

  • US 20010041398A1
  • Filed: 01/30/2001
  • Published: 11/15/2001
  • Est. Priority Date: 04/20/1999
  • Status: Abandoned Application
First Claim
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1. A method of semiconductor device fabrication including the steps of forming a composite sidewall on lateral sides of a polysilicon gate structure on a dielectric layer on a substrate, performing self-aligned silicidation on said polysilicon gate structure and said substrate exposed by patterning of said dielectric layer, partially removing said composite sidewall to expose a further area of said substrate, and implanting impurities in said further area of said substrate.

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