Circuit arrangement for a motor vehicle

• US 20010047228A1
• Filed: 05/25/2001
• Published: 11/29/2001
• Est. Priority Date: 05/26/2000
• Status: Active Grant

• Current Assignee: Bayerische Motoren Werke AG
• Original Assignee: Bayerische Motoren Werke AG
• Inventors: Bader, Richard, Froeschl, Joachim, Kaltenbrunner, Martin
• Granted Patent: US 6,745,144 B2
• Time in Patent Office: Days
• US Class Current: 701/1
• CPC Class Codes: B60R 16/0315 using multiplexing techniques multiplexing for transmission of signals G08C15/00; multiplexing for electrical communication in general H04J
• CPC Class Codes: H04L 12/437 Ring fault isolation or reconfiguration for SDH/SONET ring networks H04J3/085
• CPC Class Codes: H04L 12/66 Arrangements for connecting between networks having differing types of switching systems, e.g. gateways
• CPC Class Codes: H04L 2012/40273 the transportation system being a vehicle

Abstract

On a circuit arrangement for a motor vehicle that is equipped with a multitude of functional modules, which are connected with a joint gateway via at least two bus systems, the gateway is equipped with a receiving channel and a transmitting channel, respectively, for each bus system. The gateway contains testing instruments, which monitor the successful transmission of data to a functional module of a data bus system and/or the successful reception of data from a functional module of a data bus system. The gateway is also equipped with blocking instruments, which block the receiving channel if transmission was not successful and/or block the transmitting channel if reception was not successful.

Claims

1. A circuit arrangement for a motor vehicle equipped with multiple functional modules, the circuit arrangement comprising:

a joint gateway;

at least two bus systems through which said multiple functional modules are connected with the joint gateway;

wherein said gateway includes a receiving channel and a transmitting channel, respectively, for each of said at least two bus systems;

wherein said gateway further comprises testing instruments which monitor a successful transmission of data to a functional module of one of said bus systems and/or a successful reception of data from a functional module of one of said bus systems; and

wherein said gateway also comprises blocking instruments which block the receiving channel if a transmission was not successful and/or block the transmitting channel if the reception was not successful.

2. The circuit arrangement according to

claim 1

, wherein said gateway further comprises repeating instruments, said repeating instruments repeating the transmission of data via the transmitting channel allocated to a blocked receiving channel and/or the reception of data via the receiving channel allocated to the blocked transmitting channel under certain conditions;

wherein said gateway opens said blocking instruments when renewed transmission attempts and/or reception attempts are successful.

3. The circuit arrangement according to

claim 1

, wherein said gateway is an integrated intermediate unit arranged between said at least two bus systems and an additional functional module, said additional functional module being considered an autonomous bus system.

4. The circuit arrangement according to

claim 2

, wherein said gateway is an integrated intermediate unit arranged between said at least two bus systems and an additional functional module, said additional functional module being considered an autonomous bus system.

5. The circuit arrangement according to

claim 3

, wherein said gateway and said additional functional module form a central unit.

6. The circuit arrangement according to

claim 4

, wherein said gateway and said additional functional module form a central unit.