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Programmable task scheduler for use with multiport xDSL processing system

  • US 20010049757A1
  • Filed: 03/01/2001
  • Published: 12/06/2001
  • Est. Priority Date: 03/01/2000
  • Status: Abandoned Application
First Claim
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1. Scheduling apparatus for scheduling the transfer of machine readable data objects associated with a logical pipeline involving a plurality of processing circuitry blocks, said scheduling apparatus comprising:

  • means for handling a first transfer request for a machine readable data object, said first transfer request including a first field containing data associated with a function sharing parameter and a second field containing id data associated with the identification of one of said processing circuitry blocks that is to use said machine readable data object;

    a state machine means capable of accessing one or more offset address tables in an address table memory to obtain address information associated with the machine readable data objects, said address information being generated based on said first field and/or said second field;

    a bus interface means capable of processing said address information from said state machine block and initiating a transfer of a machine readable data object in connection with said address information.

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