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Memory testing method and memory testing apparatus

  • US 20010052093A1
  • Filed: 04/27/2001
  • Published: 12/13/2001
  • Est. Priority Date: 05/02/2000
  • Status: Active Grant
First Claim
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1. A memory testing method comprising the steps of:

  • writing a predetermined logical value in memory cells constituting each of blocks of a memory having block function;

    reading out the written logical value from the memory cells in each block;

    rendering a decision that, when the written logical value and the read-out logical value do not coincide with each other, such memory cell is a failure memory cell; and

    discontinuing, when the number of failure memory cells in a block being now tested reaches a predetermined number, the test of such block.

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