Compound semiconductor device and method of manufacturing the same

• US 20020003245A1
• Filed: 02/07/2001
• Published: 01/10/2002
• Est. Priority Date: 02/28/2000
• Status: Abandoned Application

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Ota, Kazuki, Miyamoto, Hironobu, Kato, Takehiko, Iwata, Naotaka
• Application Number:
  US09/777,910
• Publication Number:
  US 20020003245A1
• Time in Patent Office: Days
• US Class Current: 257/279
• CPC Class Codes: H01L 21/02461 Phosphides
• CPC Class Codes: H01L 21/02463 Arsenides
• CPC Class Codes: H01L 21/02543 Phosphides
• CPC Class Codes: H01L 21/02546 Arsenides
• CPC Class Codes: H01L 21/02576 N-type
• CPC Class Codes: H01L 21/02579 P-type
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02639 Preparation of substrate for selective deposition
• CPC Class Codes: H01L 21/28587 characterised by the sectional shape, e.g. T, inverted T
• CPC Class Codes: H01L 29/66462 with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT

Abstract

P-type impurities in a gate electrode is positively made to diffuse into a p-type impurity diffusion layer and an electrical p-n junction face in a gate electrode region is formed either within or on the bottom face of the p-type impurity diffusion layer, and thereby the effect that an interface state arising on a regrowth interface has over the p-n junction face can be well suppressed. This results in an improvement in high frequency characteristic of the JFET.

Claims

1. A compound semiconductor device, comprising:

a channel layer composed of an i-type compound semiconductor,

an electron supply layer composed of an n-type compound semiconductor, being formed on said channel layer,

a p-type impurity diffusion layer composed of either an i-type compound semiconductor or a p-type compound semiconductor, being formed on said electron supply layer, and

a gate electrode composed of a p-type compound semiconductor, being formed on said p-type impurity diffusion layer;

wherein;

an electrical p-n junction face between said electron supply layer and said gate electrode is formed either within said p-type impurity diffusion layer or on the bottom face of said p-type impurity diffusion layer.

2. A compound semiconductor device according to claim 1, wherein said p-n junction face is formed by diffusing one or more kinds of p-type impurities that are selected from the group consisting of Zn, Be, Mg, C and Cd into said p-type impurity diffusion layer.

3. A compound semiconductor device according to claim 1, wherein said gate electrode is formed by doping p-type impurities into a compound semiconductor having the same composition as said p-type impurity diffusion layer.

4. A compound semiconductor device according to claim 1, wherein said p-type impurity diffusion layer is composed of a compound semiconductor containing no Al.

5. A compound semiconductor device according to claim 1, wherein said p-type impurity diffusion layer is composed of either undoped GaAs or C-doped GaAs.

6. A compound semiconductor device according to claim 1, wherein said electron supply layer is composed of Si-doped Al_XGa_1-XAs ( 0<

X<

0.5 ).

7. A compound semiconductor device according to claim 1, wherein said gate electrode is composed of Zn-doped GaAs, Be-doped GaAs or C-doped GaAs.

8. A compound semiconductor device according to claim 1, wherein a p-type impurity inactive layer composed of either an i-type compound semiconductor or an n-type compound semiconductor is formed between said electron supply layer and said p-type impurity diffusion layer.

9. A compound semiconductor device according to claim 8, wherein said p-type impurity inactive layer is composed of either undoped Al_YGa_1-YAs ( 0<

Y<

0.5 ) or undoped In_ZGa_1-ZP ( 0<

Z<

0.5 ).

10. A method of manufacturing a compound semiconductor device, comprising the steps of:

forming a channel layer composed of an i-type compound semiconductor,

forming, on said channel layer, an electron supply layer composed of an n-type compound semiconductor,

forming, on said electron supply layer, a p-type impurity diffusion layer composed of either an i-type compound semiconductor or a p-type compound semiconductor,

forming, on said p-type impurity diffusion layer, a gate electrode composed of a p-type compound semiconductor, and

making p-type impurities diffuse into said p-type impurity diffusion layer and forming newly, beneath said gate electrode, a p-type compound semiconductor region capable to function as an additional gate electrode so that an electrical p-n junction face between said electron supply layer and said gate electrode may be formed either within said p-type impurity diffusion layer or on the bottom face of said p-type impurity diffusion layer.

11. A method of manufacturing a compound semiconductor device according to claim 10, wherein a p-type impurity inactive layer composed of either an i-type compound semiconductor or an n-type compound semiconductor is formed after forming said electron supply layer but before forming said p-type impurity diffusion layer.