Method of manufacturing a semiconductor device

• US 20020006711A1
• Filed: 05/08/2001
• Published: 01/17/2002
• Est. Priority Date: 09/08/1995
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Sakama, Mitsunori, Yamazaki, Shunpei, Fukada, Takeshi
• Granted Patent: US 6,703,264 B2
• Time in Patent Office: Days
• US Class Current: 438/471
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78612 for preventing the kink- or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect
• CPC Class Codes: Y10S 438/974 Substrate surface preparation

Abstract

A method of manufacturing a semiconductor device that forms laminate layers includes the steps of reducing contamination containing the single bond of carbon on at least one part of a surface on which the laminate films are formed by activated hydrogen before the laminate films are formed, and forming the laminate films on the surface on which the laminate films are formed.

Claims

1. A method of manufacturing a semiconductor device that forms laminate layers, comprising the steps of:

reducing contamination containing a single bond of carbon on at least one part of a surface on which laminate films are formed by activated hydrogen before the laminate films are formed; and

forming said laminate films on said surface.