Digital / analog converter including MOS transistor type current switches

• US 20020008653A1
• Filed: 06/26/2001
• Published: 01/24/2002
• Est. Priority Date: 06/27/2000
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: NEC Electronics Corporation (Renesas Electronics Corporation)
• Inventors: Nishimura, Kouichi
• Granted Patent: US 6,608,577 B2
• Time in Patent Office: Days
• US Class Current: 341/154
• CPC Class Codes: H03M 1/68 with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits
• CPC Class Codes: H03M 1/785 using resistors, i.e. R-2R ladders

Abstract

In a digital/analog converter, a digital-to-analog converting section includes a constant current source circuit having a plurality of binary-coding weighted current output terminals and including a plurality of MOS transistor type current switches driven by digital input signals. Each of the MOS transistor type current switches is connected between one of the binary-coding weighted current terminals and an analog output current terminal. A reference voltage generating section generates at least one reference voltage and supplies it to the constant current source circuit. A current-to-voltage converting section converts an analog output current flowing through the analog output current terminal into an analog output voltage in response to the analog output current and supplies the analog output voltage to an analog output voltage terminal.

Claims

1. A digital/analog converter comprising:

a digital-to-analog converting section including a constant current source circuit having a plurality of binary-coding weighted current output terminals and including a plurality of MOS transistor type current switches driven by digital input signals, each of said MOS transistor type current switches being connected between one of said binary-coding weighted current terminals and an analog output current terminal;

a reference voltage generating section, connected to said constant current source circuit, for generating at least one reference voltage and supplying it to said constant current source circuit; and

a current-to-voltage converting section, connected between said analog output current terminal and an analog output voltage terminal, for converting an analog output current flowing through said analog output current terminal into an analog output voltage in response to said analog output current and supplying said analog output voltage to said analog output voltage terminal.

2. The digital/analog converter as set forth in claim 1, further comprising a current mirror circuit connected between said analog output current terminal and said current-to-voltage converting section.

3. The digital analog converter as set forth in claim 1, wherein each of said MOS transistor type current switches comprises:

a first MOS transistor of one conductivity type having a drain connected to a power supply terminal, a gate for receiving one of said digital input signals and a source; and

a second MOS transistor of said conductivity type having a drain connected to said analog output current terminal, a gate for receiving an inverted signal of said digital input signals and a source connected to the source of said first MOS transistor.

4. The digital analog converter as set forth in claim 1, wherein each of said MOS transistor type current switches comprises:

a first MOS transistor of a first conductivity type having a drain connected to a power supply terminal, a gate for receiving one of said digital input signals and a source; and

a second MOS transistor of a second conductivity type having a drain connected to said analog output current terminal, a gate for receiving said one of said digital input signals and a source connected to the source of said first MOS transistor.

5. The digital/analog converter as set forth in claim 1, wherein said constant current source circuit comprises:

a master ladder circuit including a plurality of first binary-coding weighted constant current sources and a plurality of current compensating transistors each connected between one of said first binary-coding weighted constant current sources and one of said MOS transistor type current switches; and

a slave ladder circuit including a plurality of second binary-coding weighted constant current sources each connected between a least significant one of said first binary-coding weighted constant current sources and one of said MOS transistor type current switches.

6. The digital/analog converter as set forth in claim 5, wherein said first binary-coding weighted current source comprises:

a plurality of first bipolar transistors having binary-coding weighted emitter areas; and

a first R-2R resistance ladder circuit connected to the emitters of said first bipolar transistors,

said current compensating transistors comprising a plurality of said bipolar transistors,

said second binary-coding weighted current sources comprising;

a plurality of third bipolar transistors having binary-coding weighted emitter areas; and

a second R-2R resistance ladder circuit connected to the emitters of said third bipolar transistors.

7. The digital/analog converter as set forth in claim 6, wherein said reference voltage generating section comprises:

first and second reference voltage sources;

a first resistor connected to said first reference voltage source;

an operational amplifier having a first input terminal connected via said first resistor to said first reference voltage source and a second input terminal connected to said second reference voltage source;

a fourth bipolar transistor having a base connected to an output terminal of said operational amplifier and bases of said first bipolar transistors;

a second resistor connected between an emitter of said fourth bipolar transistor and said first R-2R resistance ladder circuit;

a fifth bipolar transistor having a collector connected via said first resistor to said first reference voltage source, a base connected to said second reference voltage source and bases of said second and third bipolar transistors, and an emitter connected to a collector of said fourth bipolar transistor.

8. The digital/analog converter as set forth in claim 5, wherein said first binary-coding weighted current source comprises:

a plurality of first bipolar transistors having binary-coding weighted emitter areas; and

an R-2R resistance ladder circuit connected to the emitters of said first bipolar transistors,

said current compensating transistors comprising a plurality of said bipolar transistors,

said second binary-coding weighted current sources comprising;

a plurality of third bipolar transistors having binary-coding weighted emitter areas; and

a weighted resistance circuit connected to the emitters of said third bipolar transistors.

9. The digital/analog converter as set forth in claim 8, wherein said reference voltage generating section comprises:

first and second reference voltage sources;

a first resistor connected to said first reference voltage source;

an operational amplifier having a first input terminal connected via said first resistor to said first reference voltage source and a second input terminal connected to said second reference voltage source;

a fourth bipolar transistor having a base connected to an output terminal of said operational amplifier and bases of said first bipolar transistors;

a second resistor connected between an emitter of said fourth bipolar transistor and said R-2R resistance ladder circuit;

a fifth bipolar transistor having a collector connected via said first resistor to said first reference voltage source, a base connected to said second reference voltage source and bases of said second and third bipolar transistors, and an emitter connected to a collector of said fourth bipolar transistor.

10. A digital/analog converter comprising:

a digital-to-analog converting section for converting digital input signals into an analog output current, said digital-to-analog converting section including a master ladder circuit, a slave ladder circuit and MOS transistor type current switches connected to said master ladder circuit and said slave ladder circuit and driven by digital input signals;

a reference voltage generating section connected to said digital-to-analog converting section; and

a current-to-voltage converting section, connected to said digital-to-analog converting section, for converting said analog output current into an analog output voltage,

said master ladder circuit comprising;

a plurality of first bipolar transistors having binary-coding weighted emitter areas;

a first R-2R resistance ladder circuit connected to emitters of said first bipolar transistors; and

a plurality of second bipolar transistors each having an emitter connected to a collector of one of said first bipolar transistors and a collector connected to one of said MOS transistor type current switches,

said slave ladder circuit comprising;

a plurality of third bipolar transistors having binary-coding weighted emitter areas; and

a second R-2R resistance ladder circuit connected to emitters of said second bipolar transistors,

said reference voltage generating section comprising;

first and second reference voltage sources;

a first resistor connected to said first reference voltage source;

an operational amplifier having a first input terminal connected via said first resistor to said first reference voltage source and a second input terminal connected to said second reference voltage source;

a fourth bipolar transistor having a base connected to an output terminal of said operational amplifier and bases of said first bipolar transistors;

a second resistor connected between an emitter of said fourth bipolar transistor and said first R-2R resistance ladder circuit;

a fifth bipolar transistor having a collector connected via said first resistor to said first reference voltage source, a base connected to said second reference voltage source and bases of said second and third bipolar transistors, and an emitter connected to a collector of said fourth bipolar transistor.

11. The digital/analog converter as set forth in claim 10, further comprising a current mirror circuit connected between said digital-to-analog converting section and said current-to-voltage converting section.

12. A digital/analog converter comprising:

a digital-to-analog converting section for converting digital input signals into an analog output current, said digital-to-analog converting section including a master ladder circuit, a slave ladder circuit and MOS transistor type current switches connected to said master ladder circuit and said slave ladder circuit and driven by digital input signals;

a reference voltage generating section connected to said digital-to-analog converting section; and

a current-to-voltage converting section, connected to said digital-to-analog converting section, for converting said analog output current into an analog output voltage,

said master ladder circuit comprising;

a plurality of first bipolar transistors having binary-coding weighted emitter areas;

an R-2R resistance ladder circuit connected to emitters of said first bipolar transistors; and

a plurality of second bipolar transistors each having an emitter connected to a collector of one of said first bipolar transistors and a collector connected to one of said MOS transistor type current switches,

said slave ladder circuit comprising;

a plurality of third bipolar transistors having binary-coding weighted emitter areas; and

a weighted resistance ladder circuit connected to emitters of said second bipolar transistors,

said reference voltage generating section comprising;

first and second reference voltage sources;

a first resistor connected to said first reference voltage source;

an operational amplifier having a first input terminal connected via said first resistor to said first reference voltage source and a second input terminal connected to said second reference voltage source;

a fourth bipolar transistor having a base connected to an output terminal of said operational amplifier and bases of said first bipolar transistors;

a second resistor connected between an emitter of said fourth bipolar transistor and said R-2R resistance ladder circuit;

a fifth bipolar transistor having a collector connected via said first resistor to said first reference voltage source, a base connected to said second reference voltage source and bases of said second and third bipolar transistors, and an emitter connected to a collector of said fourth bipolar transistor.

13. The digital/analog converter as set forth in claim 12, further comprising a current mirror circuit connected between said digital-to-analog converting section and said current-to-voltage converting section.

14. A digital/analog converter comprising:

a plurality of digital-to-analog converting sections each including a plurality of binary-coding weighted constant current sources and a plurality of MOS transistor type current switches connected to said constant current sources and driven by digital input signals to generate a first analog output current in response to said digital input signals;

a single reference voltage generating section, connected to said digital-to-analog converting sections, for generating at least one reference voltage and supplying said reference voltage to said constant current sources;

a plurality of current mirror circuits, each connected to one of said digital-to-analog converting sections, for converting said first analog output current into a second analog output current in response to said first analog output current;

a plurality of current-to-voltage converting sections, each connected to one of said current mirror circuit, for converting said second analog output current into an analog output voltage in response to said second analog output current.