Semiconductor device

• US 20020011983A1
• Filed: 08/06/2001
• Published: 01/31/2002
• Est. Priority Date: 12/27/1996
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Ohtani, Hisashi, Koyama, Jun, Yamazaki, Shunpei
• Granted Patent: US 7,256,760 B2
• Time in Patent Office: Days
• US Class Current: 345/92
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: G09G 2300/0408 Integration of the drivers onto the display substrate
• CPC Class Codes: G09G 2310/0286 Details of a shift registers arranged for use in a driving circuit
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3677 suitable for active matrices only
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: G09G 5/008 Clock recovery
• CPC Class Codes: G09G 5/18 Timing circuits for raster scan displays specially adapted for television H04N ; synchronisation between the display unit and other display units, videodisc player G09G5/12
• CPC Class Codes: H01L 27/1237 with a different composition, shape, layout or thickness of the gate insulator in different devices
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1277 using a crystallisation promoting species, e.g. local introduction of Ni catalyst
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A systemized active matrix display in which a pixel matrix circuit, a driver circuit and a logic circuit are mounted on the same substrate, is formed. A TFT of the present invention has such characteristics as to be able to operate in a wide driving frequency range of 0.05 to 2 GHz, and by designing a channel length and a film thickness of a gate insulating film of the TFT according to characteristics required by circuits, it is possible to form a high frequency driving circuit and a low frequency driving circuit on the same substrate.

Claims

1. A semiconductor device comprising:

a pixel matrix circuit including at least a plurality of source lines, a plurality of gate lines;

a driver circuit including at least a source line driver circuit for driving the source lines and a gate line driver circuit for driving the gate lines; and

a logic circuit for processing a signal required for driving the driver circuit and a signal including image information transmitted to the pixel matrix circuit,

wherein the pixel matrix circuit, the driver circuit and the logic circuit are disposed over a same substrate,

wherein the pixel matrix circuit, the driver circuit, and the logic circuit are constituted by a plurality of thin film transistors, each having an active layer comprising crystalline silicon, and

wherein the active layer of each of said plurality of thin film transistors comprise a plurality of rod-shaped crystals extending in one direction.

2. A semiconductor device according to claim 1 wherein crystal lattices said plurality of rod-shaped crystals are continuous within each of the active layer so that there is no barrier for carriers within each of the active layer.

3. A semiconductor device according to claim 1 wherein said device is a liquid crystal display.

4. A semiconductor device according to claim 1 wherein said rod-shaped crystals have a flattened shape.

5. A semiconductor device according to claim 1 wherein said active layer has an anisotropy between a channel length direction and a channel width direction thereof.

6. A semiconductor device according to claim 1 wherein said active layer includes an intrinsic or substantially intrinsic channel forming region.

7. A semiconductor device according to claim 1 wherein said active layer contains an element selected from the group consisting of Ni, Fe, Co, Sn, Pd, Pb, Pt, Cu and Au at a concentration 1×

10¹⁷ atoms/cm³ or lower, said element being capable of promoting crystallization of silicon.

8. A semiconductor device according to claim 1 wherein said active layer contains an element selected from the group consisting of Cl, F, and Br at a concentration from 1×

10¹⁵ to 1×

10²⁰ atoms/cm³.

9. A semiconductor device according to claim 8 wherein said element is concentrated at a portion close to a gate insulating film.

10. A semiconductor device according to claim 1 wherein said pixel matrix circuit has a plurality of pixels, and each of said pixels is provided with at least two of said plurality of thin film transistors connected in series.

11. A semiconductor device according to claim 1 wherein said pixel circuit has a plurality of pixels, each of which is provided with a storage capacitor formed between a connect wiring and a black mask.

12. A semiconductor device according to claim 11 further comprising an organic film having an opening wherein said black mask is formed on said organic film and said storage capacitor is formed within said opening.

13. A semiconductor device according to claim 11 wherein said connect wiring comprises a same material as a source electrode of each of said thin film transistors, and said connect wiring is formed from a same layer as said source electrode.

14. A semiconductor device according to claim 1 wherein one of said thin film transistors constituting said pixel matrix circuit has a different dimension from one of said thin film transistors constituting at least one of said driver circuit and said logic circuit.

15. A semiconductor device according to claim 1 wherein said logic circuit includes one or more of a phase comparator, a LPF (low pass filter), a VCO (voltage controlled oscillator), a frequency divider, a horizontal scanning oscillator, a vertical scanning oscillator, a D/A converter, an I/O port, a differential amplifier, an operational amplifier, a comparator and a memory.

16. A semiconductor device comprising:

a pixel circuit;

a driver circuit for driving said pixel circuit; and

a logic circuit for processing a signal required for driving the driver circuit, wherein said pixel circuit, said driver circuit and said logic circuit are formed over a same substrate and constituted with a plurality of N-channel type thin film transistors and a plurality of P-channel type thin film transistors;

wherein subthreshold coefficients of said N-channel thin film transistors and said P-channel thin film transistors are both within a range of 60 to 100 mV/decade.

17. A semiconductor device according to claim 16 wherein said pixel circuit has a plurality of pixels arrayed in rows and columns.

18. A semiconductor device comprising:

a pixel matrix circuit including at least a plurality of source lines, a plurality of gate lines;

a driver circuit including at least a source line driver circuit for driving the source lines and a gate line driver circuit for driving the gate lines; and

a logic circuit for processing a signal required for driving the driver circuit and a signal including image information transmitted to the pixel matrix circuit,

wherein the pixel matrix circuit, the driver circuit and the logic circuit are disposed over a same substrate,

wherein the pixel matrix circuit, the driver circuit, and the logic circuit are constituted by a plurality of thin film transistors, each having an active layer comprising crystalline silicon, and

wherein dimensions of said plurality of thin film transistors are made different depending upon required electrical characteristics by said circuits.

19. A semiconductor device according to claim 18 wherein said dimensions include at least one of a channel length and a thickness of a gate insulating film.

20. A semiconductor device comprising:

a pixel matrix circuit including at least a plurality of source lines, a plurality of gate lines;

a driver circuit including at least a source line driver circuit for driving the source lines and a gate line driver circuit for driving the gate lines; and

a logic circuit for processing a signal required for driving the driver circuit and a signal including image information transmitted to the pixel matrix circuit,

wherein the pixel matrix circuit the driver circuit and the logic circuit are disposed over a same substrate,

wherein the pixel matrix circuit, the driver circuit and the logic circuit are constituted by a plurality of thin film transistors, each having an active layer comprising crystalline silicon, and

wherein a thickness of a gate insulating film of the thin film transistors which are required to drive a circuit at 0.1 GHz or higher is 500 Å

or thinner, and a thickness of a gate insulating film of the thin film transistors which are driven by an operation voltage of 10 V or greater is 1000 Å

or thicker.

21. An active matrix display comprising:

a pixel matrix circuit including at least a plurality of source lines, a plurality of gate lines, and a plurality of TFTs;

a driver circuit including at least a source line driver circuit for driving the source lines and a gate line driver circuit for driving the gate lines; and

a logic circuit for processing a signal required for driving the driver circuit and a signal including image information transmitted to the pixel matrix circuit,

wherein the pixel matrix circuit, the driver circuit and the logic circuit are disposed on the same substrate,

wherein the pixel matrix circuit, the driver circuit, and the logic circuit are constituted by a plurality of TFTs each made of a crystalline silicon thin film, and

wherein a plurality of circuits constituting the pixel matrix circuit, the driver circuit and the logic circuit include at least two kinds of circuits which are different from each other in a driving frequency and/or an operating voltage.