LIGHT SENSOR WITH INCREASED DYNAMIC RANGE

• US 20020012056A1
• Filed: 02/26/1999
• Published: 01/31/2002
• Est. Priority Date: 02/26/1999
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: NGUYEN, DUNG C., HIRT, E. RAY, TREVINO, ROY T.
• Granted Patent: US 6,563,540 B2
• Time in Patent Office: Days
• US Class Current: 348/304
• CPC Class Codes: H04N 23/70 Circuitry for compensating brightness variation in the scene

Abstract

In an image capture system having a sensor with a first node and a second node, a method of capturing image data is disclosed. The first node is reset. The second node is reset. An image is collected on the first node. A first pixel value is then transferred from the first node to the second node after a first predetermined time period. The first pixel value and a second pixel value is then provided after a second predetermined time period. An arithmetic operation is performed on the first pixel value and the second pixel value. A system for performing the method is also disclosed.

Claims

1. In an image capture system having a sensor, the sensor having a first node and a second node, a method of capturing image data comprising the steps of:

a) resetting the first node;

b) resetting the second node;

c) collecting an image on the first node;

d) transferring a first pixel value from the first node to the second node after a first predetermined time period;

e) reading a second pixel value from the first node and the first pixel value from the second node after a second predetermined time period;

f) performing an arithmetic operation on the first pixel value and the second pixel value to generate a result; and

g) providing the result to the image capture system.

2. The method of claim 1 wherein the step of performing an arithmetic operation on the first pixel value and the second pixel value includes the step of determining a weighted average between the first pixel value and the second pixel value.

3. The method of claim 1, wherein the step of providing the result to the image capture system includes the step of performing an analog-to-digital conversion on the result.

4. The method of claim 1, wherein the step of performing an arithmetic operation on the first pixel value and the second pixel value includes the step of performing an analog-to-digital conversion on the first pixel value and the second pixel value before the arithmetic operation is performed.

5. The method of claim 1, wherein the first node and the second node are substantially segregated electronically other than when the transfer signal is asserted.

6. In an image capture system having a sensor and a controller for controlling the sensor, the sensor including a pixel array having a plurality of pixel cells arranged in rows and columns, each pixel cell having a first node for collecting an image, a second node, a third node for providing a first pixel value and a fourth node for providing a second pixel value, a focal plane processor for processing the first pixel value and second pixel value, a method of capturing image data comprising the steps of:

a) the controller asserting a first reset signal to reset the first node to a predetermined value;

b) the controller asserting a second reset signal to reset the second node to the predetermined value;

c) the pixel cell collecting an image on the first node represented by the first pixel value;

d) the controller asserting a first transfer signal to transfer the first pixel value from the first node to the second node after a first predetermined time period;

e) the controller asserting a first readout signal to read a second pixel value from the first node to the third node and to provide a second readout signal to read the first pixel value from the second node to the fourth node;

f) the focal plane processor performing an arithmetic operation on the first pixel value and the second pixel value to generate a result; and

g) the focal plane processor providing the result to the image capture system.

7. The method of claim 6 wherein the step of the focal plane processor performing an arithmetic operation includes determining a weighted average between the first pixel value and the second pixel value.

8. The method of claim 6, wherein the step of the focal plane processor providing the result to the image capture system includes the step of the focal plane processor performing an analog-to-digital conversion on the result.

9. The method of claim 6 wherein the predetermined value is approximately 0 volts.

10. The method of claim 7, wherein the step of the focal plane processor performing an arithmetic operation on the first pixel value and the second pixel value includes the step of the focal plane processor performing an analog-to-digital conversion on the first pixel value and the second pixel value before the arithmetic operation is performed

11. The method of claim 6, wherein the controller keeps the first node and the second node substantially segregated electronically other than when the first transfer signal is asserted.

12. An image capture system comprising:

a) a sensor for capturing image data having

i) a pixel array having a plurality of pixel cells arranged in rows and columns, each pixel cell having a first node for collecting image data, a second node, a third node for providing a first pixel value, and a fourth node for providing a second pixel value;

ii) a first data conductor, coupled to the third node for communicating the first pixel value;

iii) a second data conductor, coupled to the fourth node for communicating the second pixel value;

iv) a focal plane processor coupled to the first data conductor and the second data conductor for receiving the first pixel value and the second pixel value, respectively, and responsive thereto performing an arithmetic operation on the first pixel value and the second pixel value to generate a result, the focal plane processor having an output for providing the result;

v) an interface circuit, coupled to the output of each focal plane processor, for interfacing the focal plane processor to a bus; and

b) a controller, coupled to the sensor, for controlling the sensor via control signals, the control signals including a first reset signal, a second reset signal, a transfer signal, an first readout signal and an second readout signal, the controller for managing the transfer of data from the pixel cell to the focal plane processor, for controlling the focal plane processor, for managing the transfer of data from the focal plane processor to the interface circuit, for controlling the interface circuit and for managing the transfer of data to the bus;

whereby the controller controls the sensor to generate, from the same image data, the first pixel value having a different integration time than the second pixel value.

13. The image capture system of claim 12 wherein the controller is an Intel 80296 microcontroller.

14. The image capture system of claim 12 wherein the focal plane processor includes a weighted average circuit.

15. The image capture system of claim 12 wherein each pixel cell includes a first readout circuit for providing the first pixel value and a second readout circuit for providing the second pixel value.

16. The image capture system of claim 15 wherein the interface circuit includes a correlated double sampler.

17. The image capture system of claim 16 wherein the interface circuit further includes an amplifier coupled to the correlated double sampler for providing gain to the output of the correlated double sampler.

18. The image capture system of claim 17 wherein the interface circuit further includes an analog-to-digital converter coupled to the amplifier for converting the analog output of the amplifier to a digital value suitable for transmission on the bus.