Method which uses a Non-Volatile Memory to store a crypto key and a check word for an encryption device

• US 20020015498A1
• Filed: 05/07/2001
• Published: 02/07/2002
• Est. Priority Date: 02/17/2000
• Status: Active Grant

• Current Assignee: the united states of america as represented by the secretary of the navy
• Original Assignee: the united states of america as represented by the secretary of the navy
• Inventors: Houlberg, Christian L., Borgen, Gary S.
• Granted Patent: US 6,968,061 B2
• Time in Patent Office: Days
• US Class Current: 380/277
• CPC Class Codes: H04L 9/0894 Escrow, recovery or storing of secret information, e.g. secret key escrow or cryptographic key storage

Abstract

A method using a Non-Volatile Memory circuit which operates as an interface between a key loader and an encryption device in a missile'"'"'s telemetry system. The method includes a step for storing a crypto key and an associated check word and a backup crypto key and check word in the EEPROM of a microcontroller, and a step for indicating the status of a load of the crypto key in the microcontroller as well as a step for indicating the status of an erase of the crypto key from the microcontroller. The method also includes a step for turning off the missile'"'"'s transmitter when a key load occurs to prevents transmission of the crypto key and its corresponding check word. The method further includes a step for erasing the crypto key and its associated check word from an EEPROM within the microcontroller upon a missile launch.

Claims

1. A method for providing a crypto key and an associated checkword of said crypto key to an encryption device for a telemeter system of a missile, said method comprising the steps of:

(a) generating said crypto key and said associated checkword;

(b) transferring said crypto key and said associated check word to a microcontroller having a memory for a duplication and a storage of said crypto key and said associated check word within said memory;

(c) duplicating said crypto key and said associated check word within said microcontroller to provide a duplicate of said crypto key and a duplicate of said associated check word;

(d) storing said crypto key, said associated check word, the duplicate of said crypto key and the duplicate of said associated check word in the memory of said microcontroller;

(e) loading said crypto key and said associated check word from the memory of said microcontroller into said encryption device; and

(f) erasing said crypto key and said associated check word from the memory of said microcontroller upon a launch of said missile to prevent an enemy force from retrieving said crypto key and said associated check word from the missile after the launch of said missile.

2. The method of claim 1 comprising the additional step of loading the duplicate of said crypto key and the duplicate of check word into said encryption device when said encryption device rejects said crypto key.

3. The method of claim 1 comprising the additional step of indicating a status of a store of said crypto key and said associated check word into the memory of said microcontroller.

4. The method of claim 3 wherein said the status of the store of said crypto key and said associated check word into the memory of said microcontroller is indicated by a light emitting diode connected to said microcontroller.

5. The method of claim 1 comprising the additional step of indicating a status of an erase of said crypto key and said associated check word from the memory of said microcontroller.

6. The method of claim 5 wherein said the status of the erase of said crypto key and said associated check word from the memory of said microcontroller is indicated by a light emitting diode connected to said microcontroller.

7. The method of claim 1 wherein a key loader connected to said microcontroller generates said crypto key and said associated check word and transfers said crypto key and said associated checkword to said microcontroller.

8. The method of claim 1 wherein said microcontroller comprises an eight bit microcontroller having an electrically erasable programmable read only memory adapted for storing said crypto key, said associated check word, the duplicate of said crypto key and the duplicate of said associated check word.

9. The method of claim 1 wherein said encryption unit comprises a KGV-68 encryption unit.

10. The method of claim 1 comprising the additional step of:

(a) turning off a transmitter connected to said microcontroller when the transfer of said crypto key and said associated check word to said microcontroller occurs to prevent a transmission of said crypto key and said associated check word by said transmitter; and

(b) turning on said transmitter after the storage of said crypto key and said associated check word within the memory of said microcontroller.

11. The method of claim 1 comprising the additional steps of:

(a) turning off a transmitter connected to said microcontroller before a load of said crypto key and said associated check word into said encryption device occurs to prevent a transmission of said crypto key and said associated check word by said transmitter; and

(b) turning on said transmitter after the load of said crypto key and said associated check word into said encryption device.

13. The method of claim 12 comprising the additional step of loading the duplicate of said crypto key and the duplicate of check word into said encryption device when said encryption device rejects said crypto key.

14. The method of claim 12 comprising the additional step of indicating a status of a store of said crypto key and said associate d check word into the memory of said microcontroller.

15. The method of claim 14 wherein said the status of the store of said crypto key and said associated check word into the memory of said microcontroller is indicated by a light emitting diode connected to said microcontroller.

16. The method of claim 12 comprising the additional step of indicating a status of an erase of said crypto key and said associated check word from the memory of said microcontroller.

17. The method of claim 16 wherein said the status of the erase of said crypto key and said associated check word from the memory of said microcontroller is indicated by a light emitting diode connected to said microcontroller.

18. The method of claim 12 wherein a key loader connected to said microcontroller generates said crypto key and said associated check word and transfers said crypto key and said associated checkword to said microcontroller.

19. The method of claim 12 wherein said microcontroller comprises an eight bit microcontroller having an electrically erasable programmable read only memory adapted for storing said crypto key, said associated check word, the duplicate of said crypto key and the duplicate of said associated check word.

20. The method of claim 12 wherein said encryption unit comprises a KGV-68 encryption unit.

12. A method for providing a crypto key and an associated checkword of said crypto key to an encryption device for a telemeter system of a missile, said method comprising the steps of:

(a) generating said crypto key and said associated checkword;

(b) transferring said crypto key and said associated check word to a microcontroller having a memory for a duplication and a storage of said crypto key and said associated check word within said memory;

(c) disabling a transmitter connected to said microcontroller when the transfer of said crypto key and said associated check word to said microcontroller occurs to prevent a transmission of said crypto key and said associated check word by said transmitter;

(d) duplicating said crypto key and said associated check word within said microcontroller to provide a duplicate of said crypto key and a duplicate of said associated check word;

(e) storing said crypto key, said associated check word, the duplicate of said crypto key and the duplicate of said associated check word in the memory of said microcontroller;

(f) enabling said transmitter after the storage of said crypto key and said associated check word within the memory of said microcontroller;

(g) disabling said transmitter prior to a load of said crypto key and said associated check word into said encryption device;

(h) loading said crypto key and said associated check word from the memory of said microcontroller into said encryption device;

(i) enabling said transmitter after the load of said crypto key and said associated check word into said encryption device; and

(j) erasing said crypto key and said associated check word from the memory of said encryption device upon a launch of said missile to prevent an enemy force from retrieving said crypto key and said associated check word from the missile after the launch of said missile.