Packet processing device
First Claim
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1. A packet processing device having a packet processor for performing a predetermined packet process by executing an instruction, said packet processor comprising:
- a packet access unit comprising a plurality of first registers, shifting received packet data among said first registers sequentially from the beginning to transmit the shifted packet data;
a plurality of instruction procedure execution units for performing in parallel a predetermined calculation corresponding to each of a plurality of packets according to the packet data held in said first registers in said packet access unit; and
a selection signal generation unit for generating a selection signal for selecting said instruction procedure execution unit for performing the calculation corresponding to each of the packets in synchronization with a timing of receiving each packet.
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Abstract
The packet processing device which can reserve a calculation time for each instruction procedure execution unit independent of the data length of a packet by sequentially selecting an instruction procedure execution unit by a selection signal generation unit and performing a calculation on each packet when packets are consecutively input to a packet access unit is disclosed.
45 Citations
8 Claims
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1. A packet processing device having a packet processor for performing a predetermined packet process by executing an instruction, said packet processor comprising:
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a packet access unit comprising a plurality of first registers, shifting received packet data among said first registers sequentially from the beginning to transmit the shifted packet data;
a plurality of instruction procedure execution units for performing in parallel a predetermined calculation corresponding to each of a plurality of packets according to the packet data held in said first registers in said packet access unit; and
a selection signal generation unit for generating a selection signal for selecting said instruction procedure execution unit for performing the calculation corresponding to each of the packets in synchronization with a timing of receiving each packet. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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Specification