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SUPER SELF-ALIGNED TRENCH-GATE DMOS WITH REDUCED ON-RESISTANCE

  • US 20020019099A1
  • Filed: 04/22/1999
  • Published: 02/14/2002
  • Est. Priority Date: 04/22/1999
  • Status: Active Grant
First Claim
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1. A process for fabricating a trench MOSFET comprising:

  • providing a body of semiconductor material having a surface;

    forming a first mask over the surface, the first mask having an opening where a trench is to be located in the body;

    etching the semiconductor material through the opening in the first mask to form a trench in the semiconductor body;

    forming a first oxide layer in the trench;

    introducing polysilicon into the trench;

    with the first mask in place, oxidizing an exposed surface of the polysilicon to form a second oxide layer at the top of the trench, the second oxide layer extending down into the trench;

    removing the first mask; and

    depositing a metal layer on a surface of the second oxide layer and the surface of the body.

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