Apparatus and method for handling logical and numerical uncertainty utilizing novel underlying precepts

• US 20020019975A1
• Filed: 06/04/2001
• Published: 02/14/2002
• Est. Priority Date: 06/02/2000
• Status: Active Grant

• Current Assignee: Johnson, Joseph E.
• Original Assignee: Johnson, Joseph E.
• Inventors: Johnson, Joseph E.
• Granted Patent: US 6,996,552 B2
• Time in Patent Office: Days
• US Class Current: 717/117
• CPC Class Codes: G06F 17/18 for evaluating statistical data , e.g. average values, frequency distributions, probability functions, regression analysis forecasting specially adapted for a specific administrative, business or logistic context G06Q10/04
• CPC Class Codes: G06F 7/48 using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
• CPC Class Codes: G06N 5/04 Inference or reasoning models

Abstract

New techniques are disclosed for manipulating information to preserve certainty in the initial variables. Numbers themselves may be presented in a way that indicates their degree of certainty (and information content), and these numbers are processed so that the certainty and information content of the result is also known. Further calculations devoid of sufficient certainty can be terminated while others having greater information can continue. The invention may be implemented in any appropriate computing machine, such as a digital computer.

Claims

1. A data processing apparatus comprising:

a processor;

an input device for supplying input information to be processed, said input information including probability bittors indicating uncertainty of correctness;

a storage media containing rules for manipulating said input information to yield output information, said rules being capable of processing said bittors; and

an output device for receiving said output information from said processor.

2. A data processing apparatus as set forth in claim 1, wherein said probability bittors contain an order collection of numbers indicating truth and falsity, respectively.

3. A data processing apparatus as set forth in claim 2, wherein said rules for manipulating include logical operations.

4. A data processing apparatus as set forth in claim 3, wherein said logical operations function according to the equation z_i=c^t_ijkx_jy_k, where z_i is a bittor resulting from application of logical operation c^t_ijk on bittors x_j and y_k.

5. A data processing apparatus as set forth in claim 2, wherein said rules for manipulating include arithmetic operations.

6. A data processing apparatus as set forth in claim 1, wherein said processor is operative to pursue computational threads of greater and lesser probability in calculating said output information, a particular thread being terminated when its probability falls below a predetermined threshold.