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Linear half-rate phase detector and clock and data recovery circuit

  • US 20020021470A1
  • Filed: 02/12/2001
  • Published: 02/21/2002
  • Est. Priority Date: 02/17/2000
  • Status: Active Grant
First Claim
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1. A method of recovering a clock signal and data from a data signal comprising:

  • receiving the data signal having a first data rate;

    receiving the clock signal having a first clock frequency, and alternating between a first level and a second level;

    generating a first signal by passing the data signal when the clock signal is at the first level, and storing the data signal when the clock signal is at the second level;

    generating a second signal by passing the data signal when the clock signal is at the second level, and storing the data signal when the clock signal is at the first level;

    generating a third signal by passing the first signal when the clock signal is at the second level, and storing the first signal when the clock signal is at the first level;

    generating a fourth signal by passing the second signal when the clock signal is at the first level, and storing the second signal when the clock signal is at the second level;

    generating an error signal by taking an exclusive-OR of the first signal and the second signal; and

    generating a reference signal by taking an exclusive-OR of the third signal and the fourth signal, wherein the first data rate is twice the first clock frequency.

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