Dynamic configuration of input filtering parameters for an MPEG re-multiplexer

• US 20020024967A1
• Filed: 12/14/2000
• Published: 02/28/2002
• Est. Priority Date: 12/14/1999
• Status: Abandoned Application

• Current Assignee: Google Technology Holdings LLC (Alphabet Inc.)
• Original Assignee: Google Technology Holdings LLC (Alphabet Inc.)
• Inventors: Viola, Jeffrey P., Zaun, David Brian, Iaquinto, Stephen M.
• Application Number:
  US09/737,328
• Publication Number:
  US 20020024967A1
• Time in Patent Office: Days
• US Class Current: 370/429
• CPC Class Codes: H04N 21/23608 Remultiplexing multiplex streams, e.g. involving modifying time stamps or remapping the packet identifiers
• CPC Class Codes: H04N 7/24 Systems for the transmission of television signals using pulse code modulation H04N21/00 takes precedence
• CPC Class Codes: H04N 7/52 Systems for transmission of a pulse code modulated video signal with one or more other pulse code modulated signals, e.g. an audio signal or a synchronizing signal assembling of a multiplex stream by combining a video stream with other content or additional data, remultiplexing of multiplex streams, insertion of stuffing bits into the multiplex stream, assembling of a packetised elementary stream at server side H04N21/236; disassembling of a multiplex stream, remultiplexing of multiplex streams, extraction or processing of Service Information, disassembling of packetised elementary stream at client side H04N21/434

Abstract

A packet identifier table for use in conjunction with an input processor in a re-multiplexing module is divided into an active table and a pending table. Both tables conduct PID filter values used to filter incoming packet data. The active table contains PID values that are used by the re-multiplexer module, while the pending table contains PID values that can be modified while the active table is in use. A host processor switches the status of the active table and the pending table so that the modified values can be used by the input processor. Because the PID values in the active table are kept separate from the PID values that are being modified, PID value modification can occur without interrupting the re-multiplexing operation.

Claims

1. A packet identifier table for use in a re-multiplexer module having an input processor controlled by a host processor in a packet processing system, comprising:

an active table containing values used by the input processor to select packets for storage in a input packet data stream; and

a pending table containing values that can be modified by the host processor while the active table is being used by the input processor.

2. The packet identifier table of claim 1, wherein the packet identifier table is constructed as a multi-port accessible memory.

3. The packet identifier table of claim 2, wherein the multi-port accessible memory is a dual-port accessible memory.

4. The packet identifier table of claim 3, wherein the dual-port accessible memory is partitioned into two portions to form the active table and the pending table.

5. The packet identifier table of claim 1, further including a switching mechanism allowing the host processor to switch the active table into a current pending table and switch the pending table into a current active table.

6. The packet identifier table of claim 5, wherein the switching mechanism includes modifying a control bit in the input processor via the host processor.

7. A packet identifier table for use in a re-multiplexer module having an input processor controlled by a host processor in a packet processing system, comprising:

an active table containing values used by the input processor to select packets for storage in a input packet data stream; and

a pending table containing values that can be modified by the host processor while the active table is being used by the active table,

wherein the packet identifier table is a multi-port accessible memory divided into the active table and pending table, and further including a switching mechanism allowing the host processor to switch the active table into a current pending table and switch the pending table into a current active table by modifying a control bit in the input processor.

8. The packet identifier table of claim 7, wherein the multi-port accessible memory is a dual-port accessible memory.

9. The packet identifier table of claim 8, wherein the dual-port accessible memory is partitioned into two portions to form the active table and the pending table.