Liquid crystal display and a method for fabricating the same

• US 20020033927A1
• Filed: 08/14/2001
• Published: 03/21/2002
• Est. Priority Date: 08/14/2000
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Jung, Kwan-Wook, Mun, Joong-Hyun, Song, Jang-Kun, Nam, Hyo-Rak, Kim, Bo-Sung, Choi, Yong-Woo, Lee, Jung-Ho
• Granted Patent: US 7,057,695 B2
• Time in Patent Office: Days
• US Class Current: 349/156
• CPC Class Codes: G02F 1/133345 Insulating layers G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence
• CPC Class Codes: G02F 1/133707 Structures for producing distorted electric fields, e.g. bumps, protrusions, recesses, slits in pixel electrodes
• CPC Class Codes: G02F 1/13394 spacers regularly patterned on the cell subtrate, e.g. walls, pillars G02F1/133377 takes precedence
• CPC Class Codes: G02F 1/13398 Spacer materials; Spacer properties
• CPC Class Codes: G02F 1/134336 Matrix
• CPC Class Codes: G02F 1/134372 for fringe field switching [FFS] where the common electrode is not patterned
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/136231 for reducing the number of lithographic steps
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 2201/123 pixel
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/78669 with inverted-type structure, e.g. with bottom gate

Abstract

A liquid crystal display includes first and second substrates. The first substrate has a first insulating substrate, and a pixel electrode formed on the first insulating substrate with a first opening pattern. The second substrate has a second insulating substrate, and a common electrode formed on the second insulating substrate with a second opening pattern. The first and the second opening patterns proceed parallel to each other while being arranged in an alternate manner. A liquid crystal material is injected between the first and the second substrates. A spacer is positioned at an end of the second opening pattern to maintain the distance between the first and the second substrates.

Claims

1. A liquid crystal display, comprising:

a first substrate having a first insulating substrate and a pixel electrode formed on the first insulating substrate with a first opening pattern, the pixel electrode having upper and lower half regions, upper and lower sides, and left and right sides;

a second substrate having a second insulating substrate and a common electrode formed on the second insulating substrate with a second opening pattern, the first and the second opening patterns proceeding parallel to each other while being arranged in an alternate manner;

a liquid crystal material injected between the first and the second substrates; and

a spacer positioned at an end of the second opening pattern to maintain the distance between the first and the second substrates.

2. The liquid crystal display of claim 1, wherein the first opening pattern comprises a first opening portion positioned at the upper half region of the pixel electrode while proceeding in a first direction, and a second opening portion positioned at the lower half region of the pixel electrode while proceeding in a second direction, the first and the second directions being perpendicular to each other;

wherein the second opening pattern comprises;

a first trunk opening portion positioned at a region of the common electrode corresponding to the upper half region of the pixel electrode while proceeding in the first direction; and

a second trunk opening portion positioned at another region of the common electrode corresponding to the lower half region of the pixel electrode while proceeding in the second direction.

3. The liquid crystal display of claim 2, wherein the first direction proceeds slantingly with respect to the sides of the pixel electrode.

4. The liquid crystal display of claim 3, wherein the second opening pattern further comprises:

a first branch opening portion overlapped with the upper and lower sides of the pixel electrode; and

a second branch opening portion overlapping the left and right sides of the pixel electrode,

wherein the first opening pattern further comprises a third opening portion positioned between the upper and the lower half regions of the pixel electrode while proceeding parallel to the upper and lower sides of the pixel electrode, wherein the first and the second opening patterns divide the pixel electrode into a plurality of closed polygons.

5. The liquid crystal display of claim 4, wherein the second branch opening portion has an opening width larger than the first trunk opening portion.

6. The liquid crystal display of claim 2, wherein the first direction proceeds parallel to one of the sides of the pixel electrode.

7. A liquid crystal display, comprising:

a first substrate having a first insulating substrate and a pixel electrode formed on the first insulating substrate with a first opening pattern, the pixel electrode having a first side and a second side facing the first side, the first opening pattern having a first opening portion proceeding from the first side of the pixel electrode in the horizontal direction, and second and third opening portions proceeding from the first side of the pixel electrode to the second side in a slant manner symmetrical to each other with respect to the first opening portion while being gradually reduced in distance from each other;

a second substrate having a second insulating substrate facing the first insulating substrate and a common electrode formed on the second insulating substrate with a second opening pattern, the first and the second opening patterns being arranged in an alternate manner, the second opening pattern having fourth to sixth opening portions, the fourth opening portion having a trunk proceeding in the horizontal direction, first and second branches proceeding from the trunk in a slant manner while being gradually increased in distance from each other, and first and second sub-branches extended from the first and the second branches in the vertical direction while proceeding opposite to each other, the fifth opening portion having a first base proceeding parallel to the first branch, and first and second limbs extended from both ends of the first base in the horizontal direction and in the vertical direction, the sixth opening portion proceeding symmetrical to the fifth opening portion with respect to the fourth opening portion;

a liquid crystal material injected between the first and the second substrates; and

a spacer positioned at an end of the second opening pattern to maintain the distance between the first and the second substrates.

8. A liquid crystal display, comprising:

a first substrate having a first insulating substrate and a pixel electrode formed on the first insulating substrate with a first opening pattern, the pixel electrode having upper and lower half regions, the first opening pattern having a first opening portion vertically partitioning the upper half region of the pixel electrode, and a second opening portion horizontally partitioning the lower half region of the pixel electrode;

a second substrate having a second insulating substrate facing the first insulating substrate and a common electrode formed on the second insulating substrate with a second opening pattern, the second opening pattern having a third opening portion proceeding in the vertical direction, and a fourth opening portion proceeding in the horizontal direction below the third opening portion, the first and the third opening portions being arranged in an alternate manner while vertically partitioning the upper half region of the pixel electrode into a plurality of micro-regions, the second and the fourth opening portions being arranged in an alternate manner while horizontally partitioning the lower half region of the pixel electrode into a plurality of micro-regions;

a liquid crystal material injected between the first and the second substrates; and

a spacer for maintaining the distance between the first and the second substrates.

9. A color filter substrate for a liquid crystal display, comprising:

an insulating substrate;

a black matrix formed on the insulating substrate;

a color filter formed at the black matrix;

a common electrode formed on the entire surface of the common electrode; and

first and second protrusions formed on the common electrode, the first protrusion having a first thickness, the second protrusion having a second thickness, the second thickness being greater than the first thickness.

10. The liquid crystal display of claim 9, wherein the first and the second protrusions are formed with one or more of a photosensitive organic insulating layer, a photoresist film, and a silicon-based insulating layer.

11. The liquid crystal display of claim 9, wherein the common electrode is formed of indium tin oxide or indium zinc oxide.

13. The method of claim 12, wherein the insulating layer is formed with one or more of a photosensitive organic insulating layer, a photoresist film, and a silicon-based insulating layer.

14. The method of claim 12, wherein the common electrode is formed of indium tin oxide or indium zinc oxide.

15. The method of claim 12, wherein the first and the second protrusions are formed through a mask with a slit pattern corresponding to the first protrusion, and a transparent pattern corresponding to the second protrusion.

16. The method of claim 15, wherein the insulating layer is formed with a negative photosensitive organic insulating material.

17. The method of claim 12, wherein the first and the second protrusions are formed through a mask with a semitransparent pattern corresponding to the first protrusion, and an opaque pattern corresponding to the second protrusion.

18. The method of claim 17, wherein the insulating layer is formed with a positive photosensitive organic insulating material.

19. The method of claim 12, further comprising the step of forming a photoresist pattern differentiated in thickness on the insulating layer through one photolithography process.

12. A method for fabricating a color filter substrate for a liquid crystal display, comprising the steps of:

forming a black matrix on an insulating substrate;

forming a color filter on the black matrix;

forming a common electrode on an entire surface of the insulating substrate;

depositing an insulating layer onto the common electrode; and

patterning the insulating layer to thereby form a first protrusion with a first thickness, and a second protrusion with a second thickness, the second thickness being greater than the first thickness.

20. A method for fabricating a liquid crystal display, comprising the steps of:

forming a thin film transistor array substrate such that the thin film transistor array substrate has a pixel electrode with a wiring line pattern, a switching circuit and an opening pattern;

forming a color filter substrate such that the color filter substrate has a common electrode, a color filter, a high molecular pillar, and a protrusion pattern;

combining the thin film transistor array substrate with the color filter substrate; and

injecting a liquid crystal material between the thin film transistor array substrate and the color filter substrate.

21. A method for fabricating a color filter substrate for a liquid crystal display, comprising the steps of:

forming a black matrix and a color filter on a transparent substrate in a sequential manner;

forming an over-coat layer on the color filter substrate;

forming a common electrode on the over-coat layer with a transparent conductive material;

coating a photosensitive resin onto the common electrode; and

exposing the photosensitive resin to light through a mask, and developing the light-exposed photosensitive resin to thereby form a protrusion and a polymer pillar of different height, the mask having a first pattern with an opening width smaller than the resolution of the light exposing device, and a second pattern with an opening width larger than the resolution of the light exposing device.

22. The method of claim 21, wherein the protrusion has a width of 4-14 μ

m, and the polymer pillar has a width of 15-45 μ

m.

23. The method of claim 21, wherein the protrusion has a height of 1.0 -1.2 μ

m, and the polymer pillar has a height of 3.0-4.5 μ

m.

24. The method of claim 21, further comprising the steps of hard baking the protrusion and the polymer pillar at a predetermined temperature such that the protrusion and the polymer pillar bear a predetermined strength, the height of the protrusion and the polymer pillar being controlled through varying the hard baking temperature.

25. The method of claim 24 wherein the hard baking temperature is in the range of 200-240°

C.

27. The thin film transistor array substrate of claim 26, wherein the semiconductor pattern is formed with hydrogenated amorphous silicon.

28. The thin film transistor array substrate of claim 26, wherein the semiconductor pattern has the same shape as the data line assembly except that the semiconductor pattern further has a channel region between the source and the drain electrodes.

29. The thin film transistor array substrate of claim 26, wherein the semiconductor pattern is formed over the gate electrode with an island shape.

26. A thin film transistor array substrate, comprising:

a gate line assembly comprising a gate electrode and a gate line;

a data line assembly comprising a data line crossing over the gate line, a source electrode, and a drain electrode;

a semiconductor pattern contacting the source and the drain electrodes while forming a thin film transistor together with the gate electrode, the source electrode, and the drain electrode;

an organic insulating pattern formed on the semiconductor pattern, the organic insulating pattern having a protrusion pattern with a first thickness, a contact hole exposing the drain electrode, and a flat portion with a second thickness; and

a pixel electrode formed on the organic insulating pattern while being connected to the drain electrode through the contact hole.

30. A method for fabricating a thin film transistor array substrate, comprising the steps of:

forming a gate line assembly on a substrate, the gate line assembly comprising a gate line and a gate electrode;

forming a gate insulating layer on the substrate such that the gate insulating layer covers the gate line assembly;

forming a semiconductor pattern on the gate insulating layer;

forming a data line assembly on the gate insulating layer and the semiconductor pattern, the data line assembly comprising a data line, a source electrode, and a drain electrode;

forming an organic insulating pattern on the semiconductor pattern such that the organic insulating pattern has a protrusion pattern with a first thickness, a contact hole exposing the drain electrode, and a flat portion with a second thickness; and

forming a pixel electrode on the organic insulating pattern such that the pixel electrode is connected to the drain electrode through the contact hole.

31. The method of claim 30, wherein the formation of the organic insulating pattern is made through the steps of:

forming a photosensitive organic insulating layer on an entire surface of the substrate with the data line assembly;

exposing the photosensitive organic insulating layer in a selective manner such that the photosensitive organic insulating layer has a first portion blocked from light where the protrusion pattern is formed, a second portion entirely exposed to light where the contact hole is formed, and a third portion partially exposed to light; and

developing the selectively light-exposed organic insulating layer.

32. The method of claim 31, wherein the step of selectively exposing the organic insulating layer to light is made through a mask with a light blocking region placed over the first portion of the organic insulating layer, a light transmitting region placed over the second portion of the organic insulating layer, and a selectively light transmitting region placed over the third region while bearing a predetermined light transmission.

33. The method of claim 32, wherein a slit pattern or a semitransparent pattern is formed at the selectively light transmitting region of the mask.

34. The method of claim 31, wherein the step of selectively exposing the organic insulating layer to light is made through a first mask for exposing the second portion of the organic insulating layer to light, and a second mask for exposing the third portion of the organic insulating layer to light with a predetermined light transmission.

35. The method of claim 30, wherein the semiconductor pattern and the data line assembly are formed through photolithography based on a photoresist pattern of different in thickness.

36. The method of claim 35, wherein the photoresist pattern has a first portion placed over the data line assembly with a first thickness, and a second portion placed over the source and the drain electrodes with a second thickness smaller than the first thickness.

37. The method of claim 36, wherein the formation of the semiconductor pattern and the data line assembly is made through the steps of:

depositing a semiconductor layer and a conductive layer onto the gate insulating layer, and forming a photoresist pattern on the conductive layer;

etching the conductive layer using the photoresist pattern as a mask while partially exposing the semiconductor layer;

removing the exposed portion of the semiconductor layer and the second portion of the photoresist pattern through etching to thereby complete the semiconductor pattern while exposing the portion of the conductive layer between the source and the drain electrodes;

removing the exposed portion of the conductive layer to thereby complete the data line assembly; and

removing the first portion of the photoresist pattern.

38. The method of claim 35, wherein the photoresist pattern is formed through a mask with a first region with a predetermined light transmission, a second region with a light transmission lower than the first region, and a third region with a light transmission higher than the first region.