Phase lock loop
First Claim
1. A method for tuning a voltage controlled oscillator (VCO) using a phase lock loop (PLL) in order to lock the VCO to a predetermined frequency using a VCO code having a plurality of bits, comprising the steps of:
- (a) placing the PLL in an open loop phase and while in the open loop phase, performing the following steps;
(a1) using linear interpolation to set some of the VCO code'"'"'s plurality of bits; and
(a2) using a successive approximation register (SAR) to set the remaining bits of from amongst the plurality of bits in the VCO code; and
(b) placing the PLL in a closed loop phase and while in the closed loop phase;
(b1) completing the VCO frequency locking process by fine tuning the VCO.
1 Assignment
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Accused Products
Abstract
A very fast lock integer N PLL with hybrid digital coarse VCO tuning and VCO temperature drift compensation provides for a fully digital tuning scheme without the need for charge pumps. A PLL synthesizer (300) using such a PLL design provides for very fast lock times by using an open loop step and a closed loop step. The hybrid PLL can achieve coarse tuning within four clock cycles, while minimizing any errors caused by the VCO non-linearity. Temperature tracking and compensation is also provided. A SAR implementation (100) and an interpolation tuning implementation (200) are also described.
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Citations
14 Claims
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1. A method for tuning a voltage controlled oscillator (VCO) using a phase lock loop (PLL) in order to lock the VCO to a predetermined frequency using a VCO code having a plurality of bits, comprising the steps of:
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(a) placing the PLL in an open loop phase and while in the open loop phase, performing the following steps;
(a1) using linear interpolation to set some of the VCO code'"'"'s plurality of bits; and
(a2) using a successive approximation register (SAR) to set the remaining bits of from amongst the plurality of bits in the VCO code; and
(b) placing the PLL in a closed loop phase and while in the closed loop phase;
(b1) completing the VCO frequency locking process by fine tuning the VCO. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method for tuning a voltage controlled oscillator (VCO) using a phase lock loop (PLL) in order to lock the VCO to a predetermined frequency using a VCO code having a plurality of bits, comprising the steps of:
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(a) placing the PLL in an open loop phase and while in the open loop phase;
(a1) using a successive approximation register (SAR) to set the plurality of bits in the VCO code; and
(b) placing the PLL in a closed loop phase and while in the closed loop phase;
(b1) completing the VCO frequency locking process by fine tuning the VCO. - View Dependent Claims (8, 9, 10)
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11. A method for tuning a voltage controlled oscillator (VCO) using a phase lock loop (PLL) in order to lock the VCO to a predetermined frequency using a VCO code having a plurality of bits, comprising the steps of:
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(a) placing the PLL in an open loop phase and while in the open loop phase;
(a1) using linear interpolation to set the VCO code'"'"'s plurality of bits; and
(b) placing the PLL in a closed loop phase and while in the closed loop phase;
(b1) completing the VCO frequency locking process by fine tuning the VCO. - View Dependent Claims (12, 13, 14)
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Specification