Multimedia signal processing system

• US 20020037160A1
• Filed: 08/22/2001
• Published: 03/28/2002
• Est. Priority Date: 08/22/2000
• Status: Active Grant

• Current Assignee: TiVo Solutions Inc. (Adeia Inc.)
• Original Assignee: TiVo Inc. (Adeia Inc.)
• Inventors: Barton, James M., Heaton, Kurtis G., Goodman, Andrew Martin, Chow, Ching Tong, Kao, Jean Swey, Mcinnis, Roderick James, Locket, David
• Granted Patent: US 7,558,472 B2
• Time in Patent Office: Days
• US Class Current: 386/111
• CPC Class Codes: G11B 2220/216 Rewritable discs
• CPC Class Codes: G11B 2220/2562 DVDs [digital versatile discs]; Digital video discs; MMCDs; HDCDs
• CPC Class Codes: G11B 2220/2575 DVD-RAMs
• CPC Class Codes: G11B 2220/90 Tape-like record carriers
• CPC Class Codes: G11B 27/002 Programmed access in sequence to a plurality of record carriers or indexed parts, e.g. tracks, thereof, e.g. for editing; transfer of record carriers from magazine G11B15/68, G11B17/10; G11B17/22
• CPC Class Codes: G11B 27/024 on tapes G11B27/028, G11B27/029 take precedence
• CPC Class Codes: G11B 27/031 Electronic editing of digitised analogue information signals, e.g. audio or video signals
• CPC Class Codes: G11B 27/032 on tapes G11B27/036, G11B27/038 take precedence
• CPC Class Codes: G11B 27/034 on discs G11B27/036, G11B27/038 take precedence
• CPC Class Codes: G11B 27/105 of operating discs
• CPC Class Codes: H04N 21/252 Processing of multiple end-users' preferences to derive collaborative data
• CPC Class Codes: H04N 21/4147 PVR [Personal Video Recorder] H04N5/76 takes precedence ; arrangements for broadcast with accumulation-type receivers H04H20/40
• CPC Class Codes: H04N 21/4263 involving specific tuning arrangements, e.g. two tuners
• CPC Class Codes: H04N 21/4333 Processing operations in response to a pause request
• CPC Class Codes: H04N 21/4334 Recording operations recording of a television signal H04N5/76; arrangements for recording or accumulating broadcast information or broadcast-related information H04H60/27
• CPC Class Codes: H04N 21/4532 involving end-user characteristics, e.g. viewer profile, preferences monitoring of user activities for profile generation for accessing a video database G06F16/739; user profiles in network data switching protocols H04L67/306; processing of user preferences or user profiles in wireless networks H04W8/18
• CPC Class Codes: H04N 21/454 Content or additional data filtering, e.g. blocking advertisements
• CPC Class Codes: H04N 21/4622 Retrieving content or additional data from different sources, e.g. from a broadcast channel and the Internet web site content organization and management for information retrieval from the Internet G06F16/958; transmission by internet of broadcast information H04H60/82; stock exchange data over packet-switching network H04L12/1804; push services including data channel over packet-switching network H04L12/1859
• CPC Class Codes: H04N 5/76 Television signal recording
• CPC Class Codes: H04N 5/775 between a recording apparatus and a television receiver
• CPC Class Codes: H04N 5/781 : on disks or drums
• CPC Class Codes: H04N 7/17318 : Direct or substantially direct transmission and handling of requests
• CPC Class Codes: H04N 9/7921 : for more than one processing mode
• CPC Class Codes: H04N 9/7925 : for more than one standard
• CPC Class Codes: H04N 9/87 : Regeneration of colour television signals H04N9/80 takes precedence

Abstract

A multimedia signal processing system utilizes an easily manipulated, low-cost storage and display system that allows the user to view a television program and instantly review previous scenes within the program. The invention also allows the user to store selected programs while simultaneously watching or reviewing another. A versatile system architecture enables providing the invention in multiple configurations, each adapted to receive input signals from a different source. At the highest level, the system includes an input section and an output section. Across all configurations, the output section remains substantially the same, while the input section varies according to the signal type and the source. Thus, several configurations are provided, each one requiring only minor system board modifications. The system architecture thus simplifies the design and manufacturing challenge presented by producing units to serve different markets, such as digital satellite, digital cable and analog cable.

Claims

1. A system for the simultaneous storage and playback of multimedia data, comprising:

an input section for acquiring and tuning an input signal;

an output section, wherein said input signal is passed to said output section as a transport stream;

said output section including;

a processor;

means for decoding said transport stream, said means for decoding said transport stream connected to said processor by means of a first data transfer element; and

a bridging element connected to said decoder/host controller by means of a second data transfer element, said bridging element operative to interface a plurality of system components;

wherein said input section is individualized according to source type.

2. The system of claim 1, wherein said input section is adapted to accept an analog input signal.

3. The system of claim 2, wherein said input section accepts said analog input signal from any of RF coaxial, composite audio/video and S-video connectors.

4. The system of claim 2, said input section comprising;

a tuner for tuning to a desired channel;

a decoder for digitizing a video component of said signal;

a multi-standard sound processor for processing an audio component of said signal;

an MPEG-2 encoder, wherein said MPEG-2 encoder receives said digitized video and audio components, whereupon said signals are encoded and multiplexed into an MPEG-2 transport stream.

5. The system of claim 4, further comprising a memory element.

6. The system of claim 3, further comprising a secondary input, said secondary input comprising a second set of RF coaxial, composite audio/video or S-video connectors.

7. The system of claim 1, wherein said input section is adapted to accept a digital satellite input signal.

8. The system of claim 7, wherein said input section comprises:

at least one satellite tuner; and

at least one demodulating element to demodulate the digital satellite signal to an MPEG-2 transport stream.

9. The system of claim 1, wherein said input section is adapted to accept an input signal in both analog and digital formats from at least one RF coaxial connector.

10. The system of claim 9, wherein said input section comprises:

at least one tuner for tuning to a desired channel;

at least one decoder for digitizing a video component of said signal;

at least one multi-standard sound processor for processing an audio component of said signal;

an MPEG-2 encoder having multi-stream encode capability, wherein said MPEG-2 encoder receives said digitized video and audio components, whereupon said signals are encoded and multiplexed into an MPEG-2 transport stream.

11. The system of claim 10, further comprising at least one memory element.

12. The system of claim 1, said output section further comprising a transport interface, wherein said transport interface receives said transport stream from said input section.

13. The system of claim 12, said means for decoding a transport stream comprising an MPEG transport stream decoder/graphics subsystem, wherein said first data transfer element comprises a host bus.

14. The system of claim 13, wherein said transport stream decoder/graphics subsystem includes:

a host bridge;

a memory controller;

an MPEG-2 transport demultiplexer;

an MPEG-2 decoder;

an audio/video decoder;

a graphics processor;

a PCI bridge;

a bus controller;

a SMARTCARD interface; and

,

a modem interface.

15. The system of claim 14, said transport stream decoder/graphics subsystem further comprising at least one transport stream interface, wherein said transport stream interface receives said transport stream from said input section.

16. The system of claim 14, wherein said transport stream is demultiplexed into audio and video packet streams, wherein said packet streams are stored and played back through an output side of said transport stream decoder/graphics subsystem.

17. The system of claim 14, wherein said transport stream decoder/graphics subsystem further comprises a plurality of outputs, wherein said decoded signal is output to a television, said outputs including any of:

S-video;

audio;

SPDIR (Stereo Paired Digital Interface); and

CVBS (Composite Video Baseband Signal).

18. The system of claim 14, further comprising at least one SMARTCARD reader interfaced to said transport stream decoder/graphics subsystem.

19. The system of claim 14, further comprising a flash PROM connected to said transport stream decoder/graphics subsystem, said PROM containing boot code that initializes said system prior to loading of operating system kernel.

20. The system of claim 14, further comprising a SDRAM connected to said transport stream decoder/graphics subsystem.

21. The system of claim 14, further comprising a modem connected to said modem interface.

22. The system of claim 1, wherein said processor comprises a MIPS processor and wherein said first data transfer element comprises a host bus.

23. The system of claim 1, wherein said processor is operative to run system software, middleware, and application software.

24. The system of claim 23, wherein said system software includes at least:

an operating system kernel and device drivers, said system software operative to initialize and control hardware components.

25. The system of claim 1, wherein said bridging element comprises a media manager, said media manager including:

an IDE host controller with data encryption;

a DMA controller;

an IR receiver/transmitter interface;

at least one UART (Universal Asynchronous Receiver/Transmitter);

at least one I²S bus;

at least one GPIO (General Purpose Input/Output);

a PCI bus arbiter;

an MPEG media stream processor;

a PCM audio mixer (Pulse Code Modulation);

a high speed transport output interface;

a fan control; and

a scanning interface for a front panel navigation keypad cluster.

26. The system of claim 25, wherein said media manager is implemented in an ASIC (Application Specific Integrated Circuit) or a programmable logic device.

27. The system of claim 25, further comprising a temperature sensor coupled to said fan control

28. The system of claim 25, further comprising a fan connected to said fan control.

29. The system of claim 25, further comprising a real-time clock connected to said I²S bus.

30. The system of claim 25, further comprising a secure micro controller connected to said UART, said micro controller operative in cryptographic applications, including authentication and encryption/decryption.

31. The system of claim 25, further comprising a RS232 port coupled to said UART.

32. The system of claim 25, further comprising a IEEE1394 interface integrated on said media manager.

33. The system of claim 25, further comprising a front panel LED array coupled to said GPIO.

34. The system of claim 25, further comprising a front panel navigation cluster coupled to said GPIO.

35. The system of claim 25, further comprising a remote control coupled to said IR receiver/transmitter.

36. The system of claim 1, wherein said second data transfer element comprises a system bus.

37. The system of claim 36, wherein said system bus comprises a PCI bus.

38. The system of claim 37, further comprising a USB (Universal Serial Bus) controller coupled to said PCI bus.

39. The system of claim 1, wherein said system is implemented as a system board.

40. The system of claim 1, wherein said output section is implemented as a plurality of microchips, the chips connected to each other by means of said data transfer elements.

41. The system of claim 1, wherein said output section is implemented as either a single microchip or a chipset.

43. The system of claim 41, wherein said means for observing said data stream comprises a system interface, said system interface comprising a passive, slave client on said bus, wherein said system interface observes said data stream without interfering with data flow.

44. The system of claim 43, wherein said system interface is individualized to a particular system type, said individualization being accomplished by one of:

programmable switches and hardwiring.

45. The system of claim 43, wherein said data bus is one of:

a system bus and a memory bus.

49. The system of claim 48, wherein said state engine reloads the first state if a media stream identifier associated with said first state is presented.

42. A system for processing a media stream across several channels simultaneously, comprising:

means for observing a data stream on a data bus;

means for identifying media streams within said data stream;

means for associating media stream data objects with their respective media streams;

a multi channel media stream processor, wherein said media processor processes media stream data across a plurality of channels, in parallel; and

means for monitoring and saving state of said processor as said processor switches from an original media stream to a next media stream, wherein, if said processor switches back to said original stream, a state associated with said original stream is reloaded.

46. The system of claim 42, wherein said means for identifying a media stream comprises a media stream identifier, wherein said media stream distinguishes media streams from the remainder of said data stream according to source and destination addresses.

47. The system of claim 42, wherein said means for associating media data objects with their respective media streams comprises a media identification generator, said media identification generator assigning tags to media stream data objects, so that any data object is associated with its stream of origin.

48. The system of claim 42, wherein said means for monitoring and saving state of said processor comprises a multi-channel state engine, said state engine monitoring media stream identifiers, and saving said processor state, said saved state comprising a first state, when a media stream identifier associated with said next media stream is associated.

50. The system of claim 42, further comprising a media stream data structure, said processed media stream being saved to said data structure and routed to system memory as needed.

51. The system of claim 42, wherein said system is implemented in a programmable logic device.

52. A method of processing a media stream across several channels simultaneously, comprising the steps of:

observing a data stream on a data bus;

identifying media streams within said data stream;

associating media stream data objects with their respective media streams;

processing media stream data across a plurality of channels, in parallel; and

monitoring and saving a media processor state as said processor switches from an original media stream to a next media stream; and

reloading state associated with said original stream if said processor switches back to said original stream.

53. The system of claim 52, wherein said step of observing said data stream comprises the steps of:

providing a system interface, said system interface comprising a passive, slave client on said bus; and

said system interface observing said data stream without interfering with data flow.

54. The system of claim 53, wherein said system interface is individualized to a particular system type, said individualization being accomplished by one of:

programmable switches and hardwiring.

55. The system of claim 53, wherein said data bus is one of:

a system bus and a memory bus.

56. The system of claim 52, wherein said step of identifying a media stream comprises the steps of:

distinguishing media streams from the remainder of said data stream according to source and destination addresses.

57. The method of claim 52, wherein said step of:

associating media data objects with their respective media streams comprises;

assigning tags to media stream data objects, so that any data object is associated with its stream of origin.

58. The method of claim 52, wherein said step of monitoring and saving said processor state comprises the steps of:

monitoring media stream identifiers; and

saving said processor state, said saved state comprising a first state, when a media stream identifier associated with said next media stream is associated.

59. The method of claim 58, wherein said step of monitoring and saving said processor state further comprises:

reloading the first state if a media stream identifier associated with said first state is presented.

60. The method of claim 52, further comprising the steps of:

saving said processed media stream to a media data structure; and

routing to system memory as needed.

61. The method of claim 52, said method implemented by means of a programmable logic device.