Techniques for an interrupt free operating system

• US 20020038332A1
• Filed: 02/23/2001
• Published: 03/28/2002
• Est. Priority Date: 11/13/1998
• Status: Active Grant

• Current Assignee: U.S. District Court for the Southern District of Florida.
• Original Assignee: U.S. District Court for the Southern District of Florida.
• Inventors: Alverson, Gail A., Callahan, Charles David II, Kaplan, Laurence S., Korry, Richard D., Coatney, Susan L.
• Granted Patent: US 7,020,767 B2
• Time in Patent Office: Days
• US Class Current: 718/107
• CPC Class Codes: G06F 9/4812 by interrupt, e.g. masked
• CPC Class Codes: G06F 9/542 Event management; Broadcasting; Multicasting; Notifications

Abstract

A method and system in a multithreaded processor for processing events without interrupt notifications. In one aspect of the present invention, an operating system creates a thread to execute on a stream of the processor. During execution of the thread, the thread executes a loop that determines whether an event has occurred and, in response to determining whether an event has occurred, assigns a different thread to process the event so that multiple events can be processed in parallel and so that interrupts are not needed to signal that the event has occurred. Another aspect of the present invention provides a method and system for processing asynchronously occurring events without interrupt notifications. To achieve this processing, a first thread is executed to generate a notification that the event has occurred upon receipt of the asynchronously occurring event. A second thread is also executed that loops determining whether a notification has been generated and, in response to determining that a notification has been generated, performing the processing necessary for the event.

Claims

1. A method in a multithreaded processor for processing events without interrupt notifications, the method comprising:

creating a thread to execute on a stream of the processor; and

during execution of the thread, executing a loop that determines whether an event has occurred; and

in response to determining whether an event has occurred, assigns a different thread to process the event so that multiple events can be processed in parallel.

2. The method of claim 1 wherein the created thread is a listener thread.

3. The method of claim 1 wherein the assigning of a different thread includes the creating of a thread.

4. The method of claim 1 wherein an event is the unblocking of a thread of a user program.

5. The method of claim 1 wherein an event is the unblocking of a thread of an operating system.

6. The method of claim 1 wherein the event is the expiration of a timer.

7. The method of claim 6 wherein the assigning of a different thread includes sending a message to another thread.

8. The method of claim 7 wherein the other thread creates a thread to process the timer expiration.

9. The method of claim 1 wherein determining includes checking a data structure to determine if any thread are unblocked.

10. A method in a multithreaded processor for processing asynchronously occurring events without interrupt notifications, the method comprising:

upon receipt of the asynchronously occurring event, executing a first thread to generate a notification that the event has occurred; and

executing a second thread with a loop that determines whether a notification has been generated;

in response to determining that a notification has been generated, performs the processing necessary for the event.

11. The method of claim 10 wherein the second thread is a virtual processor thread.

12. The method of claim 10 wherein the generated notification is placing an indication of a unit of work on a queue.

13. The method of claim 10 wherein the first thread is a device driver.

14. The method of claim 13 wherein the device driver invokes a callback routine to process the event.

15. The method of claim 10 including executing a stream of an input/output processor to indicate the occurrence of the event.

17. The method of claim 16 wherein the number of forwarding words in the chain is adjusted to effect a change in the rate at which the program executes instructions.

18. The method of claim 16 wherein the instruction is within a loop to effectively reduce the rate at which the loop is executed.

19. The method of claim 16 wherein the computer has a multithreaded processor.

16. A method in a computer for reducing the rate at which a program executes instructions by executing an instruction to access data in memory pointed to by a chain of forwarding words so that subsequent instructions are not executed until a memory subsystem resolves the chain of forwarding words.

20. A method in a computer system for reducing the rate at which a program executes instructions by executing an operation to perform a synchronized access to a word of memory that will eventually fail so that the issuing of new instructions is deferred until after receiving notification of the failure.

21. The method of claim 20 including re-executing the operation a predetermined number of times to control the rate at which the program executes instructions.

22. The method of claim 20 wherein the failure of the operation is indicated by raising a retry-limit exception.

23. The method of claim 22 wherein the program disables the trapping of the retry-limit exception so that a thread that issued the operation can handle the exception.