Server farm formed of systems on a chip

• US 20020040391A1
• Filed: 07/19/2001
• Published: 04/04/2002
• Est. Priority Date: 10/04/2000
• Status: Abandoned Application

• Current Assignee: Agiletv Corporation (Promptu Systems Corporation)
• Original Assignee: Agiletv Corporation (Promptu Systems Corporation)
• Inventors: Foster, Mark J., Chaiken, David
• Application Number:
  US09/910,096
• Publication Number:
  US 20020040391A1
• Time in Patent Office: Days
• US Class Current: 709/220
• CPC Class Codes: G06F 15/17337 Direct connection machines, e.g. completely connected computers, point to point communication networks coupling between buses G06F13/4004
• CPC Class Codes: G10L 15/30 Distributed recognition, e.g. in client-server systems, for mobile phones or network applications
• CPC Class Codes: H04L 45/06 Deflection routing, e.g. hot-potato routing

Abstract

A network architecture is provided in which a server farm is assembled with systems-on-a-chip, each of which implements one or more integrated standard or other network interfaces. The standard network interface of a system-on-a-chip is connected point-to-point to the standard network interface on another system-on-a-chip. The configuration disclosed herein eliminates the need for standard network opponents when assembling the server farm, resulting in significant savings both in terms of cost and space.

Claims

1. A network architecture, comprising:

a server farm comprised of a plurality of systems-on-a-chip;

each system-on-a-chip implementing one or more integrated standard or other network interfaces; and

an interconnect scheme for connecting said system-on-a-chip via said network interfaces, wherein said interconnect scheme eliminates physical interfaces that are otherwise required to establish communications between servers in a server farm.

2. The network architecture of claim 1, said interconnect scheme comprising a point-to-point scheme.

3. The network architecture of claim 1, said standard network interface comprising Ethernet.

4. The network architecture of claim 1, said interconnect scheme comprising a back plane comprising a plurality of connectors.

5. The network architecture of claim 1, said systems-on-a-chip being interconnected to define two or more PLEX arrays.

6. A data communications network, comprising:

a standard networking component for implementing a standard data communications network;

a plurality of systems-on-a-chip that each comprise at least one processor and that each provide one or more standard network interfaces;

a plurality of servers, each of said servers defined by one or more systems-on-a-chip; and

a plurality of servers connected by said standard data communications network to define a server farm; and

an interconnect scheme for connecting said systems-on-a-chip via said network interfaces, wherein said interconnect scheme eliminates physical interfaces that are otherwise required to establish communications between servers in said server farm.

7. The network of claim 6, said interconnect scheme comprising a point-to-point scheme.

8. The network of claim 6, said standard network interface comprising Ethernet.

9. The network of claim 6, said interconnect scheme comprising a back plane comprising a plurality of connectors.

10. The network of claim 6, said systems-on-a-chip being interconnected to define two or more PLEX arrays.

11. A network interconnection method, comprising the steps of:

providing a server farm comprised of a plurality of systems-on-a-chip;

each system-on-a-chip implementing one or more integrated standard or other network interfaces; and

providing an interconnect scheme for connecting said system-on-a-chip via said network interfaces, wherein said interconnect scheme eliminates physical interfaces that are otherwise required to establish communications between servers in a server farm.

12. The method of claim 11, said interconnect scheme comprising a point-to-point scheme.

13. The method of claim 11, said standard network interface comprising Ethernet.

14. The method of claim 11, said interconnect scheme comprising a back plane comprising a plurality of connectors.

15. The method of claim 11, said systems-on-a-chip being interconnected to define two or more PLEX arrays.

17. The method of claim 16, further comprising:

an interconnect scheme for connecting said systems-on-a-chip via said network interfaces, wherein said interconnect scheme eliminates physical interfaces that are otherwise required to establish communications between servers in said server farm.

18. The method of claim 17, said interconnect scheme comprising a point-to-point scheme.

19. The method architecture of claim 16, said standard network interface comprising Ethernet.

20. The method architecture of claim 17, said interconnect scheme comprising a back plane comprising a plurality of connectors.

21. The method architecture of claim 16, said systems-on-a-chip being interconnected to define two or more PLEX arrays.

16. A data communications method, comprising the steps of:

implementing a standard data communications network with a standard networking component;

providing a plurality of systems-on-a-chip that each comprise at least one processor and that each provide one or more standard network interfaces;

providing a plurality of servers, each of said servers defined by one or more systems-on-a-chip; and

connecting a plurality of said servers by said standard data communications network to define a server farm.