Electronic devices and a sheet strip for packaging bonding wire connections of electronic devices and method for producing them
First Claim
Patent Images
1. A sheet strip for covering bonding wire connections in a bonding channel of an electronic device, comprising:
- at least two preformed, mutually opposite edge regions covering edge regions of the bonding channel in an overlapping manner; and
a preformed central region extending between said opposite edge regions and having a bulge and a thickened portion, said central region further having two convexly curved contour lines in cross section.
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Abstract
An electronic device is described that has a sheet strip for packaging bonding wire connections of the electronic device and a method for producing it. To that end, the sheet strip, has at least two preformed, opposite edge regions which cover the edge regions of the bonding channel in an overlapping manner. Furthermore, the sheet strip has a preformed central region situated between the edge regions, which central region has a bulge and thickened portion and has two convexly curved contour lines in cross section.
20 Citations
27 Claims
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1. A sheet strip for covering bonding wire connections in a bonding channel of an electronic device, comprising:
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at least two preformed, mutually opposite edge regions covering edge regions of the bonding channel in an overlapping manner; and
a preformed central region extending between said opposite edge regions and having a bulge and a thickened portion, said central region further having two convexly curved contour lines in cross section.
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2. An electronic device, comprising:
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a chip having an active surface and contact areas;
a laminate disposed on said active area of said chip and having a bonding channel with edge regions formed therein, said laminate further having contact connection areas, conductor tracks and soldering contact areas and surrounds said bonding channel, said contact areas of said chip disposed along said bonding channel;
bonding wires connecting said contact areas of said chip to said contact connection areas of said laminate; and
a flowable sheet formed of a potting compound surrounding said bonding wires in said bonding channel, said flowable sheet overlapping said edge regions of said bonding channel, said flowable sheet selected from the group consisting of a flowable sheet strip and flowable sheet patches. - View Dependent Claims (3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 18, 19, 20, 21, 22, 23, 24, 25, 26)
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17. A method for producing an electronic device, which comprises the steps of:
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providing a semiconductor chip having contact areas;
disposing a laminate on the semiconductor chip, the laminate having contact connection areas, conductor tracks and soldering contact areas, the laminate further having bonding channels formed therein for exposing a surface of the semiconductor chip on which the contact areas are disposed at a bottom of the bonding channel;
connecting the contact areas to the contact connection areas on the laminate using a bonding wire resulting in bonding wire connections;
positioning a sheet strip above the bonding channel with edge regions of the bonding channel being overlapped by edge regions of the sheet strip;
laminating the edge regions of the sheet strip onto the edge regions of the bonding channel, with the result that a convexly curved central region of the sheet strip arches over the bonding channel with the bonding wires;
heating the sheet strip to a flow temperature of the sheet strip causing a melting of the sheet strip in a central region resulting in a potting of the bonding wires; and
cooling the sheet strip in the bonding channel.
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27. A sheet strip for covering bonding wire connections on bonding pads of an electronic device, comprising:
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at least two preformed, mutually opposite edge regions covering edge regions of the bonding pads in an overlapping manner; and
a preformed central region extending between said opposite edge regions and having a bulge and a thickened portion, said central region further having two convexly curved contour lines in cross section.
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Specification