SYSTEM AND METHOD FOR PERFORMING TABLE LOOK-UPS USING A MULTIPLE DATA FETCH ARCHITECTURE
First Claim
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1. A method for use with a data processing system for accessing data from a data memory using indirect addressing wherein one full data access is made for every instruction cycle executed by said data processing system, said method including the steps of:
- performing a dual data fetch during said instruction cycle, said dual data fetch including using a data pointer to a location in a first data memory to fetch a data word from said first data memory, said dual data fetch including fetching an offset value from a second data memory; and
updating said data pointer by adding a pointer associated with a base address to an offset value retrieved during a previous instruction cycle.
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Abstract
A novel table look-up/indirect addressing system and method uses a dual fetch Harvard architecture to accomplish one full table look-up access per instruction cycle. The offset access fetch, the indirect data fetch and the table offset and base address addition are all performed during a single cycle. The system and method also accommodate data accesses using packed (half word) offsets.
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Citations
8 Claims
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1. A method for use with a data processing system for accessing data from a data memory using indirect addressing wherein one full data access is made for every instruction cycle executed by said data processing system, said method including the steps of:
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performing a dual data fetch during said instruction cycle, said dual data fetch including using a data pointer to a location in a first data memory to fetch a data word from said first data memory, said dual data fetch including fetching an offset value from a second data memory; and
updating said data pointer by adding a pointer associated with a base address to an offset value retrieved during a previous instruction cycle. - View Dependent Claims (2, 3, 4)
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5. A data processing system for accessing data from a first data memory, said system using indirect addressing wherein one full data access is made for every instruction cycle executed by said data processing system, said system comprising:
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a pointer addressing unit for fetching an offset value from a second data memory;
a data addressing unit, incorporating a data pointer means for pointing to a location in said first data memory, said data addressing unit for fetching a data word from said first data memory, said data addressing unit including means for updating said data pointer by adding a pointer associated with a base address to an offset value retrieved during a previous instruction cycle; and
a dual fetch control for causing said data fetches by said pointer addressing unit and said data addressing unit to occur during a single instruction cycle. - View Dependent Claims (6, 7, 8)
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Specification