Semiconductor device and method of fabricating the same

• US 20020044230A1
• Filed: 04/24/2001
• Published: 04/18/2002
• Est. Priority Date: 04/27/2000
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Arai, Yasuyuki, Yamazaki, Shunpei
• Granted Patent: US 6,580,475 B2
• Time in Patent Office: Days
• US Class Current: 349/43
• CPC Class Codes: G02F 1/133302 Rigid substrates, e.g. inorganic substrates
• CPC Class Codes: G02F 1/133553 Reflecting elements associated to illuminating devices G02F1/133605
• CPC Class Codes: G02F 1/134336 Matrix
• CPC Class Codes: G02F 1/13439 characterised by their electrical, optical, physical properties; materials therefor; method of making
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/136295 Materials; Compositions; Manufacture processes
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 2201/123 pixel
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02592 amorphous
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 21/02686 Pulsed laser beam
• CPC Class Codes: H01L 21/3003 Hydrogenation or deuterisation, e.g. using atomic hydrogen from a plasma
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1218 with a particular composition or structure of the substrate
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1251 comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
• CPC Class Codes: H01L 27/1255 : integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1285 : using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
• CPC Class Codes: H01L 29/66537 : using a self aligned punch through stopper or threshold implant under the gate region H01L29/66606 takes precedence
• CPC Class Codes: H01L 29/78621 : with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/78633 : with a light shield
• CPC Class Codes: H01L 29/78678 : with inverted-type structure, e.g. with bottom gate
• CPC Class Codes: H01L 29/78684 : having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys H01L29/7869 takes precedence
• CPC Class Codes: H01L 29/78696 : characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H10K 59/12 : Active-matrix OLED [AMOLED] displays
• CPC Class Codes: H10K 59/121 : characterised by the geometry or disposition of pixel elements
• CPC Class Codes: H10K 59/1213 : the pixel elements being TFTs
• CPC Class Codes: H10K 59/1216 : the pixel elements being capacitors
• CPC Class Codes: H10K 59/122 : Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 59/123 : Connection of the pixel electrodes to the thin film transistors [TFT]
• CPC Class Codes: H10K 59/124 : Insulating layers formed between TFT elements and OLED elements
• CPC Class Codes: H10K 59/131 : Interconnections, e.g. wiring lines or terminals
• CPC Class Codes: H10K 59/1315 : comprising structures specially adapted for lowering the resistance

Abstract

An active matrix display device having a pixel structure in which pixel electrodes, gate wirings and source wirings are suitably arranged in the pixel portions to realize a high numerical aperture without increasing the number of masks or the number of steps. The device comprises a gate electrode and a source wiring on an insulating surface, a first insulating layer on the gate electrode and on the source wiring, a semiconductor layer on the first insulating film, a second insulating layer on the semiconductor film, a gate wiring connected to the gate electrode on the second insulating layer, a connection electrode for connecting the source wiring and the semiconductor layer together, and a pixel electrode connected to the semiconductor layer.

Claims

1. A semiconductor device comprising:

a gate electrode and a source wiring over an insulating surface;

a first insulating film over the gate electrode and over the source wiring;

a semiconductor film over the first insulating film;

a second insulating film over the semiconductor film;

a gate wiring connected to the gate electrode over the second insulating film; and

a connection electrode for connecting the source wiring and the semiconductor film together.

2. A device according to claim 1, wherein the gate electrode includes one or plural kinds of elements selected from molybdenum, tungsten and tantalum.

3. A device according to claim 1, wherein the first insulating film includes at least a first layer of silicon nitride and a second layer of silicon oxide.

4. A device according to claim 1, wherein the second insulating film includes at least a first layer of an inorganic insulating material and a second layer of an organic insulating material.

5. A device according to claim 1, wherein the second insulating film includes at least a first layer of an inorganic insulating material and a second layer of an organic insulating material, and wherein the connection wiring, the gate wiring and the pixel electrode are formed on the second layer of the organic insulating material.

6. A device according to claim 1, wherein the pixel electrode has an electrically conducting layer comprising aluminum or silver as a main component formed on the surface thereof.

7. A device according to claim 1, wherein there is formed a region where the gate electrode, the semiconductor film and the gate wiring are overlapped one upon the other.

8. A device according to claim 1, further comprising a liquid crystal layer over the pixel electrode.

9. A device according to claim 1, further comprising an organic compound layer over the pixel electrode.

59. A method according to claim 57, wherein the gate electrode is formed of an electrically conducting film which includes one or plural kinds of elements selected from molybdenum, tungsten and tantalum.

10. A semiconductor device comprising:

a gate electrode and a source wiring over an insulating surface;

a first insulating film over the gate electrode and over the source wiring;

a semiconductor film over the first insulating film;

a second insulating film over the semiconductor film;

a gate wiring connected to the gate electrode over the second insulating film;

a connection electrode for connecting the source wiring and the semiconductor film together; and

a pixel electrode connected to the semiconductor film.

11. A device according to claim 10, wherein the end on one side of the pixel electrode is formed over the source wiring.

12. A device according to claim 11, further comprising a third insulating layer over the semiconductor film of a region that is overlapped over the gate electrode.

13. A device according to claim 10, wherein the gate electrode includes one or plural kinds of elements selected from molybdenum, tungsten and tantalum.

14. A device according to claim 10, wherein the first insulating film includes at least a first layer of silicon nitride and a second layer of silicon oxide.

15. A device according to claim 10, wherein the second insulating film includes at least a first layer of an inorganic insulating material and a second layer of an organic insulating material.

16. A device according to claim 10, wherein the second insulating film includes at least a first layer of an inorganic insulating material and a second layer of an organic insulating material, and wherein the connection wiring, the gate wiring and the pixel electrode are formed on the second layer of the organic insulating material.

17. A device according to claim 10, wherein the pixel electrode has an electrically conducting layer comprising aluminum or silver as a main component formed on the surface thereof.

18. A device according to claim 10, wherein there is formed a region where the gate electrode, the semiconductor film and the gate wiring are overlapped one upon the other.

19. A device according to claim 10, further comprising a liquid crystal layer over the pixel electrode.

20. A device according to claim 10, further comprising an organic compound layer over the pixel electrode.

21. A semiconductor device comprising:

a gate electrode and a source wiring over an insulating surface;

a first insulating film over the gate electrode and over the source wiring;

a semiconductor film formed over the first insulating film so as to be partly overlapped over the gate electrode;

a second insulating film over the semiconductor film;

a gate wiring connected to the gate electrode over the second insulating film;

a connection electrode for connecting the source wiring and the semiconductor film together; and

a pixel electrode connected to the semiconductor film.

22. A device according to claim 21, wherein the end on one side of the pixel electrode is formed over the source wiring.

23. A device according to claim 21, wherein the gate electrode includes one or plural kinds of elements selected from molybdenum, tungsten and tantalum.

24. A device according to claim 21, wherein the first insulating film includes at least a first layer of silicon nitride and a second layer of silicon oxide.

25. A device according to claim 21, wherein the second insulating film includes at least a first layer of an inorganic insulating material and a second layer of an organic insulating material.

26. A device according to claim 21, wherein the second insulating film includes at least a first layer of an inorganic insulating material and a second layer of an organic insulating material, and wherein the connection wiring, the gate wiring and the pixel electrode are formed on the second layer of the organic insulating material.

27. A device according to claim 21, wherein the pixel electrode has an electrically conducting layer comprising aluminum or silver as a main component formed on the surface thereof.

28. A device according to claim 21, wherein there is formed a region where the gate electrode, the semiconductor film and the gate wiring are overlapped one upon the other.

29. A device according to claim 21, further comprising a liquid crystal layer over the pixel electrode.

30. A device according to claim 21, further comprising an organic compound layer over the pixel electrode.

31. A semiconductor device comprising:

a gate electrode and a source wiring over an insulating surface;

a first insulating film over the gate electrode and over the source wiring;

a semiconductor film provided over the first insulating film so as to include a source region, a drain region and a channel-forming region;

a second insulating film over the semiconductor film;

a gate wiring connected to the gate electrode over the second insulating film;

a connection electrode for connecting the source wiring and the source region together; and

a pixel electrode connected to the drain region.

32. A device according to claim 31, wherein the end on one side of the pixel electrode is formed over the source wiring.

33. A device according to claim 31, wherein the gate electrode includes one or plural kinds of elements selected from molybdenum, tungsten and tantalum.

34. A device according to claim 31, wherein the first insulating film includes at least a first layer of silicon nitride and a second layer of silicon oxide.

35. A device according to claim 31, wherein the second insulating film includes at least a first layer of an inorganic insulating material and a second layer of an organic insulating material.

36. A device according to claim 31, wherein the second insulating film includes at least a first layer of an inorganic insulating material and a second layer of an organic insulating material, and wherein the connection wiring, the gate wiring and the pixel electrode are formed on the second layer of the organic insulating material.

37. A device according to claim 31, wherein the pixel electrode has an electrically conducting layer comprising aluminum or silver as a main component formed on the surface thereof.

38. A device according to claim 31, wherein there is formed a region where the gate electrode, the semiconductor film and the gate wiring are overlapped one upon the other.

39. A device according to claim 31, further comprising a liquid crystal layer over the pixel electrode.

40. A device according to claim 31, further comprising an organic compound layer over the pixel electrode.

41. A semiconductor device comprising:

a first gate electrode, a second gate electrode and a source wiring over an insulating surface;

a first insulating film over the first and second gate electrodes and over the source wiring;

a first semiconductor film having a source region, a drain region and a channel-forming region over the first insulating film;

a second semiconductor film overlapped over the second gate electrode;

a second insulating film over the first and second semiconductor films;

a gate wiring connected to the gate electrode over the second insulating film;

a connection electrode for connecting the source wiring and the source region together; and

a pixel electrode connected to the drain region and to the second semiconductor film.

42. A device according to claim 41, wherein the end on one side of the pixel electrode is formed over the source wiring.

43. A device according to claim 41, wherein the gate electrode includes one or plural kinds of elements selected from molybdenum, tungsten and tantalum.

44. A device according to claim 41, wherein the first insulating film includes at least a first layer of silicon nitride and a second layer of silicon oxide.

45. A device according to claim 41, wherein the second insulating film includes at least a first layer of an inorganic insulating material and a second layer of an organic insulating material.

46. A device according to claim 41, wherein the second insulating film includes at least a first layer of an inorganic insulating material and a second layer of an organic insulating material, and wherein the connection wiring, the gate wiring and the pixel electrode are formed on the second layer of the organic insulating material.

47. A device according to claim 41, wherein the pixel electrode has an electrically conducting layer comprising aluminum or silver as a main component formed on the surface thereof.

48. A device according to claim 41, wherein there is formed a region where the gate electrode, the semiconductor film and the gate wiring are overlapped one upon the other.

49. A device according to claim 41, further comprising a liquid crystal layer over the pixel electrode.

50. A device according to claim 41, further comprising an organic compound layer over the pixel electrode.

51. A method of fabricating a semiconductor device comprising:

a first step of forming a gate electrode and a source wiring over an insulating surface;

a second step of forming a first insulating film over the gate electrode;

a third step of forming a semiconductor film over the first insulating film;

a fourth step of forming a second insulating film over the semiconductor film; and

a fifth step of forming, over the second insulating film, a gate wiring connected to the gate electrode, a connection electrode for connecting the source wiring and the semiconductor film together, and a pixel electrode connected to the semiconductor film.

52. A method according to claim 51, wherein the gate electrode is formed of an electrically conducting film which includes one or plural kinds of elements selected from molybdenum, tungsten and tantalum.

53. A method according to claim 51, wherein the second step includes a step of forming a first layer of silicon nitride and of forming a second layer of silicon oxide.

54. A method according to claim 51, wherein the second insulating film forming step includes a step of forming a first layer of an inorganic insulating material and a step of forming a second layer of an organic insulating material.

55. A method according to claim 51, further comprising the step of forming a liquid crystal layer over the pixel electrode.

56. A method according to claim 51, further comprising the step of forming an organic compound layer over the pixel electrode.

58. A method according to claim 57, wherein, after the third step, a third insulating layer is formed over the semiconductor film in a region thereof overlapped over the gate electrode.

60. A method according to claim 57, wherein the second step includes a step of forming a first layer of silicon nitride and of forming a second layer of silicon oxide.

61. A method according to claim 57, wherein the second insulating film forming step includes a step of forming a first layer of an inorganic insulating material and a step of forming a second layer of an organic insulating material.

62. A method according to claim 57, further comprising the step of forming a liquid crystal layer over the pixel electrode.

63. A method according to claim 57, further comprising the step of forming an organic compound layer over the pixel electrode.

57. A method of fabricating a semiconductor device comprising:

a first step of forming a gate electrode and a source wiring over an insulating surface;

a second step of forming a first insulating film over the gate electrode;

a third step of forming a semiconductor film on the first insulating film so as to be partly overlapped over the gate electrode;

a fourth step of forming a second insulating film over the semiconductor film; and

a fifth step of forming, over the second insulating film, a gate wiring connected to the gate electrode, a connection electrode for connecting the source wiring and the semiconductor film together, and a pixel electrode connected to the semiconductor film.

64. A method of fabricating a semiconductor device comprising:

a first step of forming a gate electrode and a source wiring over an insulating surface;

a second step of forming a first insulating film over the gate electrode;

a third step of forming a semiconductor film over the first insulating film;

a fourth step of forming a source region and a drain region over the semiconductor film;

a fifth step of forming a second insulating film over the semiconductor film; and

a sixth step of forming, over the second insulating film, a gate wiring connected to the gate electrode, a connection electrode for connecting the source wiring and the source region together, and a pixel electrode connected to the drain region.

65. A method according to claim 64, wherein the gate electrode is formed of an electrically conducting film which includes one or plural kinds of elements selected from molybdenum, tungsten and tantalum.

66. A method according to claim 64, wherein the second step includes a step of forming a first layer of silicon nitride and of forming a second layer of silicon oxide.

67. A method according to claim 64, wherein the second insulating film forming step includes a step of forming a first layer of an inorganic insulating material and a step of forming a second layer of an organic insulating material.

68. A method according to claim 64, further comprising the step of forming a liquid crystal layer over the pixel electrode.

69. A method according to claim 64, further comprising the step of forming an organic compound layer over the pixel electrode.

70. A method of fabricating a semiconductor device comprising:

a first step of forming a first gate electrode, a second gate electrode and a source wiring over an insulating surface;

a second step of forming a first insulating film over the first and second gate electrodes;

a third step of forming, over the first insulating film, a first semiconductor film that overlaps over the first gate electrode and a second semiconductor film that overlaps over the second gate electrode;

a fourth step of forming a source region and a drain region in the first semiconductor film;

a fifth step of forming a second insulating film on the semiconductor film; and

a sixth step of forming, over the second insulating film, a gate wiring connected to the gate electrode, a connection electrode for connecting the source wiring and the source region together, and a pixel electrode for connecting the drain region and the second semiconductor film together.

71. A method according to claim 70, wherein the gate electrode is formed of an electrically conducting film which includes one or plural kinds of elements selected from molybdenum, tungsten and tantalum.

72. A method according to claim 70, wherein the second step includes a step of forming a first layer of silicon nitride and of forming a second layer of silicon oxide.

73. A method according to claim 70, wherein the second insulating film forming step includes a step of forming a first layer of an inorganic insulating material and a step of forming a second layer of an organic insulating material.

74. A method according to claim 70, further comprising the step of forming a liquid crystal layer over the pixel electrode.

75. A method according to claim 70, further comprising the step of forming an organic compound layer over the pixel electrode.