Method and system for creating electronic circuitry

• US 20020046015A1
• Filed: 09/26/2001
• Published: 04/18/2002
• Est. Priority Date: 06/04/1998
• Status: Abandoned Application

• Current Assignee: Silicon Metrics Corp. (Synopsys Incorporated)
• Original Assignee: Silicon Metrics Corp. (Synopsys Incorporated)
• Inventors: Croix, John Francis
• Application Number:
  US09/963,885
• Publication Number:
  US 20020046015A1
• Time in Patent Office: Days
• US Class Current: 703/14
• CPC Class Codes: G06F 30/33 Design verification, e.g. functional simulation or model checking

Abstract

According to a first model of an operation of circuitry, a first set of estimates of the operation is generated in response to a set of conditions, including a first estimate of the operation in response to a first condition. According to a second model of the operation, a second set of estimates of the operation is generated in response to the first condition and the first set. In response to a comparison between the first estimate and the second set, a subset of the first set is selected. According to the second model, an estimate of the operation is generated in response to a second condition and the selected subset.

Claims