Flash eeprom system
First Claim
1. A Flash EEprom system comprising:
- one or more integrated circuit chips each having an array of Flash EEprom cells partitioned into a plurality of sectors, each sector addressable for erase such that all cells therein are erasable simultaneously;
means for selecting a plurality of sectors among the one or more chips for erase operation; and
means for simultaneously performing the erase operation on only the plurality of selected sectors.
2 Assignments
0 Petitions
Accused Products
Abstract
A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.
-
Citations
62 Claims
-
1. A Flash EEprom system comprising:
-
one or more integrated circuit chips each having an array of Flash EEprom cells partitioned into a plurality of sectors, each sector addressable for erase such that all cells therein are erasable simultaneously;
means for selecting a plurality of sectors among the one or more chips for erase operation; and
means for simultaneously performing the erase operation on only the plurality of selected sectors. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
-
-
10. A system for correcting errors from defective cells within an array of Flash EEprom cells, comprising:
-
substitute cells;
means for substituting one or more of the defective cells with a corresponding number of substitute cells. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 26)
-
-
19. A system for correcting bad data in defective cells within an array of Flash EEprom cells, comprising:
-
substitute cells for storing good data intended for the defective cells;
means for substituting the bad data in one or more of the defective cells with the good data in the corresponding substitute cells when the defective cells are accessed.
-
- 20. A system for correcting bad data in defective cells within an array of Flash EEprom cells as in clain 19, further comprising means for automatically saving the good data intended to be written to the defective cells to the corresponding substitute cells, thereby perserving the integrity of the good data.
-
30. An improved system for writing data files into a Flash EEprom memory comprising:
-
a cache memory for temporarily storing data files intended for the Flash EEprom memory, said cache memory able to undergo significantly more write/erase cycles than the Flash EEprom memory;
means responsive to a system write to the Flash EEprom memory for writing data files into the cache memory instead of the Flash EEprom memory;
means for identifying each data file in the cache memory;
means for determining the time since each data file was last written; and
means for first moving data file having the longest time since last written from the cache memory to the Flash EEprom memory when additional space for new data files is required in the cache memory, thereby substantially reducing the number of actual writes and associated stress to the Flash EEprom memory. - View Dependent Claims (31, 32, 33, 34, 35, 37, 38, 39, 40, 41)
-
-
36. An improved system for writing data files into a Flash EEprom memory comprising:
-
a cache memory for temporarily storing data files intended for the Flash EEprom memory, said cache memory able to undergo significantly more write/erase cycles than the Flash EEprom memory;
means responsive to a system write to the Flash EEprom memory for writing data files into the cache memory instead of the Flash EEprom memory;
a tag memory for storing the identity of data files and the time each data file was last written; and
means for first moving data file having the longest time since last written from the cache memory to the Flash EEprom memory when additional space for new data files is required in the cache memory, thereby substantially reducing the number of actual writes and associated stress to the Flash EEprom memory.
-
-
42. An improved system for writing data files into a Flash EEprom memory comprising:
-
a cache memory for temporarily storing data files intended for the Flash EEprom memory, said cache memory able to undergo significantly more write/erase cycles than the Flash EEprom memory;
means responsive to a system write to the Flash EEprom memory for writing a data file either into the Flash EEprom memory or instead into the cache memory, said responsive means writing to the Flash EEprom when the a previous copy of said data file is not present in the cache memory, and writing to the cache memory when a previous copy of said data file is present in the cache memory; and
means for first moving data files having the longest times since last written from the cache memory to the Flash EEprom memory when additional space for new data files is required in the cache memory, thereby substantially reducing the number of actual writes and associated stress to the Flash EEprom memory. - View Dependent Claims (43, 44, 45, 47, 48, 49)
-
-
46. An improved system for writing data files into a Flash EEprom memory comprising:
-
a cache memory for temporarily storing data files intended for the Flash EEprom memory, said cache memory able to undergo significantly more write/erase cycles than the Flash EEprom memory;
means responsive to a system write to the Flash EEprom memory for writing a data file either into the Flash EEprom memory or instead into the cache memory, said responsive means writing to the Flash EEprom when said data file is last written after the predetermined period of time, and writing to the cache memory when said data file is last written within a predetermined period of time; and
means for first moving data files having the longest times since last written from the cache memory to the Flash EEprom memory when additional space for new data files is required in the cache memory, thereby substantially reducing the number of actual writes and associated stress to the Flash EEprom memory.
-
-
50. An improved system for writing data files into a Flash EEprom memory comprising:
-
a cache memory for temporarily storing data files intended for the Flash EEprom memory, said cache memory able to undergo significantly more write/erase cycles than the Flash EEprom memory;
a tag memory for storing the identity of data files and the time each data file was last written;
means responsive to a system write to the Flash EEprom memory for writing a data file either into the Flash EEprom memory or instead into the cache memory, sa id responsive means writing to the Flash EEprom when the data file is not identified in the tag memory, and writing to the cache memory when the data file is identified in the tag memory; and
means for moving first the data files having the longest times since last written from the cache memory to the Flash EEprom memory when additional space for new data files is required in the cache memory, thereby substantially reducing the number of actual writes and associated stress to the Flash EEprom memory. - View Dependent Claims (51, 52, 53, 54, 55, 57, 58, 59, 60, 61, 62)
-
-
56. A memory card adapted to plug into a computer system in a manner to communicate with a system bus and a standard power supply, comprising the following mounted thereon:
-
a plurality of EEprom integrated circuit chips, each of said chips including;
a large number of individually addressable storage cells organized into a plurality of sectors, each sector containing a plurality of said storage cells, a plurality of spare storage cells within any of said sectors, means responsive to signals on said system bus for erasing all cells in one or more designated sectors without erasing cells in others of said sectors, means responsive to signals on said system bus for reading the state of addressed storage cells, means responsive to signals on said system bus for programming addressed storage cells to a predetermined state, and means responsive to an unsuccessful attempt to either program or erase a storage cell within one of said sectors for substituting one of said spare storage cells therefore while maintaining operation of the remaining cells of said sector.
-
Specification