Nitride semiconductor growth method, nitride semiconductor substrate, and nitride semiconductor device

• US 20020046693A1
• Filed: 11/08/2001
• Published: 04/25/2002
• Est. Priority Date: 04/11/1997
• Status: Active Grant

• Current Assignee: Nichia Chemical Industries Limited
• Original Assignee: Nichia Chemical Industries Limited
• Inventors: Nakamura, Shuji, Chocho, Kazuyuki, Kiyoku, Hiroyuki, Kozaki, Tokuya, Iwasa, Naruhito
• Granted Patent: US 7,083,679 B2
• Time in Patent Office: Days
• US Class Current: 117/8
• CPC Class Codes: B82Y 20/00 Nanooptics, e.g. quantum optics or photonic crystals
• CPC Class Codes: C23C 16/042 using masks
• CPC Class Codes: C23C 16/303 Nitrides
• CPC Class Codes: C30B 25/02 Epitaxial-layer growth
• CPC Class Codes: C30B 29/40 AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
• CPC Class Codes: C30B 29/403 AIII-nitrides
• CPC Class Codes: C30B 29/406 Gallium nitride
• CPC Class Codes: H01L 21/0237 Materials
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/02433 Crystal orientation
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/02502 consisting of two layers
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02576 N-type
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02639 Preparation of substrate for selective deposition
• CPC Class Codes: H01L 21/02642 Mask materials other than SiO2 or SiN
• CPC Class Codes: H01L 21/02647 Lateral overgrowth
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/16 with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
• CPC Class Codes: H01S 2301/173 : The laser chip comprising special buffer layers, e.g. dislocation prevention or reduction
• CPC Class Codes: H01S 2304/12 : Pendeo epitaxial lateral overgrowth [ELOG], e.g. for growing GaN based blue laser diodes
• CPC Class Codes: H01S 5/0213 : Sapphire, quartz or diamond based substrates
• CPC Class Codes: H01S 5/0422 : with n- and p-contacts on the same side of the active layer
• CPC Class Codes: H01S 5/2201 : in a specific crystallographic orientation
• CPC Class Codes: H01S 5/32025 : non-polar orientation
• CPC Class Codes: H01S 5/3211 : characterised by special cladding layers, e.g. details on band-discontinuities
• CPC Class Codes: H01S 5/3216 : quantum well or superlattice cladding layers
• CPC Class Codes: H01S 5/34333 : with a well layer based on Ga(In)N or Ga(In)P, e.g. blue laser

Abstract

A method of growing a nitride semiconductor crystal which has very few crystal defects and can be used as a substrate is disclosed. This invention includes the step of forming a first selective growth mask on a support member including a dissimilar substrate having a major surface and made of a material different from a nitride semiconductor, the first selective growth mask having a plurality of first windows for selectively exposing the upper surface of the support member, and the step of growing nitride semiconductor portions from the upper surface, of the support member, which is exposed from the windows, by using a gaseous Group 3 element source and a gaseous nitrogen source, until the nitride semiconductor portions grown in the adjacent windows combine with each other on the upper surface of the selective growth mask.

Claims

1. A nitride semiconductor growth method comprising the steps of:

(a) forming a first selective growth mask on a support member made up of a dissimilar substrate made of a material different from a nitride semiconductor and having a major surface, and an underlayer made of a nitride semiconductor formed on the major surface of the dissimilar substrate, said first selective growth mask having a plurality of first windows selectively exposing an upper surface of the underlayer of the support member; and

(b) growing nitride semiconductor portions from the upper surface portions, of the underlayer, which are exposed from the windows, by using a gaseous Group 3 element source and a gaseous nitrogen source, until the nitride semiconductor portions grown in the adjacent windows combine with each other on an upper surface of said selective growth mask.

2. A method according to claim 1, wherein a total area of upper surfaces of portions, of the underlayer, which are covered with said first selective growth mask is larger than that of portions, of the underlayer, which are exposed from the first windows.

3. A method according to claim 2, wherein said first selective growth mask is made up of a plurality of individual stripes spaced apart from each other, defining the first windows therebetween, and extending parallel to each other.

4. A method according to claim 3, wherein a ratio of a width of each of the stripes to a width of each of the first windows is more than 1 and not more than 20.

5. A method according to claim 4, wherein a ratio of a width of each of the stripes to a width of each of the first windows is more than 1 and not more than 10.

6. A method according to claim 3, wherein a width of each of the first windows is not more than 8 μ

m and not less than 0.1 μ

m.

7. A method according to claim 6, wherein a width of each of the first windows is not more than 5 μ

m and not less than 0.1 μ

m.

8. A method according to claim 3, wherein each of the stripes has a thickness of 0.01 to 5 μ

m.

9. A method according to claim 3, wherein the dissimilar substrate is a sapphire substrate having a major surface forming a (0001) plane, and the respective stripes extend in a direction perpendicular to a (11{overscore (2)}0) plane of sapphire.

10. A method according to claim 9, wherein the dissimilar substrate has an off-angled major surface.

11. A method according to claim 10, wherein the dissimilar substrate has a major surface off-angled stepwise.

12. A method according to claim 3, wherein the dissimilar substrate is a sapphire substrate having a major surface forming a (11{overscore (2)}0) plane, and the respective stripes extend in a direction perpendicular to the (1{overscore (1)}20) plane of sapphire.

13. A method according to claim 12, wherein the dissimilar substrate has an off-angled major surface.

14. A method according to claim 13, wherein the dissimilar substrate has a major surface off-angled stepwise.

15. A method according to claim 3, wherein the dissimilar substrate is a spinnel substrate having a major surface forming a (111) plane, and the respective stripes extend in a direction perpendicular to the (110) plane of spinnel.

16. A method according to claim 1, wherein the step (b) further comprises doping the first nitride semiconductor portion with an n-type impurity during growth of the first nitride semiconductor portion.

17. A method according to claim 16, wherein the n-type impurity is added such that a doping concentration decreases with an increase in distance from the dissimilar substrate.

18. A method according to any one of claims 1 to 17, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 2,000.

19. A method according to claim 18, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 1,800.

20. A method according to claim 18, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 1,500.

21. A method according to claim 18, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not less than 10.

22. A method according to claim 21, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not less than 30.

23. A method according to claim 18, wherein growth of the first nitride semiconductor portion in the step (b) is performed by a metalorganic vapor-phase epitaxial method.

24. A method according to claim 23, wherein growth of the nitride semiconductor portion is performed under a reduced pressure of 50 to 400 Torr.

25. A method according to claim 1, wherein growth of the first nitride semiconductor portion in the step (b) is performed by a metalorganic vapor-phase epitaxial method, and the method further comprises the step (c) of growing a second nitride semiconductor portion on the first nitride semiconductor portion grown in the step (b) by a halide vapor-phase epitaxial growth method.

26. A method according to claim 25, wherein a total area of upper surfaces of portions, of the underlayer, which are covered with said first selective growth mask is larger than that of portions, of the underlayer, which are exposed from the first windows.

27. A method according to claim 25, wherein said first selective growth mask is made up of a plurality of individual stripes spaced apart from each other, defining the first windows therebetween, and extending parallel to each other.

28. A method according to claim 27, wherein a ratio of a width of each of the stripes to a width of each of the first windows is more than 1 and not more than 20.

29. A method according to claim 28, wherein a ratio of a width of each of the stripes to a width of each of the first windows is more than 1 and not more than 10.

30. A method according to claim 28, wherein a width of each of the first windows is not more than 8 μ

m and not less than 0.1 μ

m.

31. A method according to claim 28, wherein a width of each of the first windows is not more than 5 μ

m and not less than 0.1 μ

m.

32. A method according to claim 27, wherein each of the stripes has a thickness of 0.01 to 5 μ

m.

33. A method according to claim 27, wherein the dissimilar substrate is a sapphire substrate having a major surface forming a (0001) plane, and the respective stripes extend in a direction perpendicular to a (11{overscore (2)}0) plane of sapphire.

34. A method according to claim 33, wherein the dissimilar substrate has an off-angled major surface.

35. A method according to claim 34, wherein the dissimilar substrate has a major surface off-angled stepwise.

36. A method according to claim 35, wherein the dissimilar substrate is a sapphire substrate having a major surface forming a (11{overscore (2)}0) plane, and the respective stripes extend in a direction perpendicular to the (1{overscore (1)}20) plane of sapphire.

37. A method according to claim 36, wherein the dissimilar substrate has an off-angled major surface.

38. A method according to claim 37, wherein the dissimilar substrate has a major surface off-angled stepwise.

39. A method according to claim 35, wherein the dissimilar substrate is a spinnel substrate having a major surface forming a (111) plane, and the respective stripes extend in a direction perpendicular to the (110) plane of spinnel.

40. A method according to claim 25, wherein the step (b) and/or the step (c) further comprises doping the nitride semiconductor portion with an n-type impurity during growth of the nitride semiconductor portion.

41. A method according to claim 40, wherein the n-type impurity is added such that a doping concentration decreases with an increase in distance from the dissimilar substrate.

42. A method according to any one of claims 25 to 41, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 2,000.

43. A method according to claim 42, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 1,800.

44. A method according to claim 42, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 1,500.

45. A method according to claim 42, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not less than 10.

46. A method according to claim 42, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not less than 30.

47. A method according to claim 42, wherein growth of the nitride semiconductor portion is performed under a reduced pressure of 50 to 400 Torr.

48. A nitride semiconductor portion growth method according to claim 1, further comprising:

the step (c) of forming a second selective growth mask on the first nitride semiconductor portion grown in the step (b), said second selective growth mask having a plurality of second windows selectively exposing upper surfaces of the first nitride semiconductor portions; and

the step (d) of growing second nitride semiconductor portions from the upper surfaces, of the first nitride semiconductor portions, which are exposed from the second windows, by using a gaseous Group 3 element source and a gaseous nitrogen source, until the second nitride semiconductor portions grown in the adjacent windows combine with each other on an upper surface of said second selective growth mask.

49. A method according to claim 48, wherein a total area of upper surfaces of portions, of the underlayer, which are covered with said first selective growth mask is larger than that of portions, of the underlayer, which are exposed from the first windows, and a total area of upper surfaces of portions, of the first nitride semiconductor portions, which are covered with said second selective growth mask is larger than that of portions, of the first nitride semiconductor portions, which are exposed from the second windows.

50. A method according to claim 49, wherein said first and selective growth mask are made up of a plurality of individual stripes spaced apart from each other, defining the first windows therebetween, and extending parallel to each other.

51. A method according to claim 50, wherein a ratio of a width of each of the stripes to a width of each of the windows is more than 1 and not more than 20.

52. A method according to claim 51, wherein a ratio of a width of each of the stripes to a width of each of the windows is more than 1 and not more than 10.

53. A method according to claim 51, wherein a width of each of the windows is not more than 8 μ

m and not less than 0.1 μ

m.

54. A method according to claim 53, wherein a width of each of the windows is not more than 5 μ

m and not less than 0.1 μ

m.

55. A method according to claim 50, wherein each of the stripes has a thickness of 0.01 to 5 μ

m.

56. A method according to claim 50, wherein the dissimilar substrate is a sapphire substrate having a major surface forming a (0001) plane, and the respective stripes extend in a direction perpendicular to a (11{overscore (2)}0) plane of sapphire.

57. A method according to claim 56, wherein the dissimilar substrate has an off-angled major surface.

58. A method according to claim 57, wherein the dissimilar substrate has a major surface off-angled stepwise.

59. A method according to claim 50, wherein the dissimilar substrate is a sapphire substrate having a major surface forming a (11{overscore (2)}0) plane, and the respective stripes extend in a direction perpendicular to the (1{overscore (1)}20) plane of sapphire.

60. A method according to claim 59, wherein the dissimilar substrate has an off-angled major surface.

61. A method according to claim 60, wherein the dissimilar substrate has a major surface off-angled stepwise.

62. A method according to claim 50, wherein the dissimilar substrate is a spinnel substrate having a major surface forming a (111) plane, and the respective stripes extend in a direction perpendicular to the (110) plane of spinnel.

63. A method according to claim 48, wherein the step (b) and/or the step (d) further comprises doping the nitride semiconductor portion with an n-type impurity during growth of the first nitride semiconductor portion.

64. A method according to claim 63, wherein the n-type impurity is added such that a doping concentration decreases with an increase in distance from the dissimilar substrate.

65. A method according to any one of claims 48 to 64, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 2,000 in the step (b) and/or the step (d).

66. A method according to claim 65, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 1,800.

67. A method according to claim 65, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 1,500.

68. A method according to claim 65, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not less than 10.

69. A method according to claim 65, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not less than 30.

70. A method according to claim 65, wherein growth of the nitride semiconductor portion in the step (b) and/or the step (d) is performed by a metal organic vapor-phase epitaxial method.

71. A method according to claim 70, wherein growth of the nitride semiconductor portion in the step (b) and/or the step (d) is performed under a reduced pressure of 50 to 400 Torr.

72. A nitride semiconductor growth method comprising the steps of:

(a) forming a first selective growth mask on a support member including a dissimilar substrate made of a material different from a nitride semiconductor and having a major surface, said first selective growth mask having a plurality of first windows partly exposing an upper surface of the support member, such that a total area of upper surfaces of portions, of the support member, which are covered with said first selective growth mask is larger than that of portions, of the support member, which are exposed from the first windows; and

(b) growing first nitride semiconductor portions from the upper surface portions, of the support member, which are exposed from the windows, by using a gaseous Group 3 element source and a gaseous nitrogen source, until the nitride semiconductor portions grown in the adjacent windows combine with each other on an upper surface of said selective growth mask.

73. A method according to claim 72, wherein said first selective growth mask is made up of a plurality of individual stripes spaced apart from each other, defining the first windows therebetween, and extending parallel to each other.

74. A method according to claim 73, wherein a ratio of a width of each of the stripes to a width of each of the first windows is not more than 20.

75. A method according to claim 73, wherein a ratio of a width of each of the stripes to a width of each of the first windows is not more than 10.

76. A method according to claim 74, wherein a width of each of the first windows is not more than 8 μ

m and not less than 0.1 μ

m.

77. A method according to claim 74, wherein a width of each of the first windows is not more than 5 μ

m and not less than 0.1 μ

m.

78. A method according to claim 73, wherein each of the stripes has a thickness of 0.01 to 5 μ

m.

79. A method according to claim 73, wherein the dissimilar substrate is a sapphire substrate having a major surface forming a (0001) plane, and the respective stripes extend in a direction perpendicular to a (11{overscore (2)}0) plane of sapphire.

80. A method according to claim 79, wherein the dissimilar substrate has an off-angled major surface.

81. A method according to claim 80, wherein the dissimilar substrate has a major surface off-angled stepwise.

82. A method according to claim 73, wherein the dissimilar substrate is a sapphire substrate having a major surface forming a (11{overscore (2)}0) plane, and the respective stripes extend in a direction perpendicular to the (1{overscore (1)}20) plane of sapphire.

83. A method according to claim 82, wherein the dissimilar substrate has an off-angled major surface.

84. A method according to claim 83, wherein the dissimilar substrate has a major surface off-angled stepwise.

85. A method according to claim 73, wherein the dissimilar substrate is a spinnel substrate having a major surface forming a (111) plane, and the respective stripes extend in a direction perpendicular to the (110) plane of spinnel.

86. A method according to claim 72, wherein the step (b) further comprises doping the first nitride semiconductor portion with an n-type impurity during growth of the first nitride semiconductor portion.

87. A method according to claim 86, wherein the n-type impurity is added such that a doping concentration decreases with an increase in distance from the dissimilar substrate.

88. A method according to any one of claims 72 to 87, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 2,000.

89. A method according to claim 88, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 1,800.

90. A method according to claim 88, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 1,500.

91. A method according to claim 88, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not less than 10.

92. A method according to claim 88, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not less than 30.

93. A method according to claim 88, wherein growth of the first nitride semiconductor portion in the step (b) is performed by a metal organic vapor-phase epitaxial method.

94. A method according to claim 93, wherein growth of the nitride semiconductor portion is performed under a reduced pressure of 50 to 400 Torr.

95. A method according to claim 72, wherein growth of the first nitride semiconductor portion in the step (b) is performed by a metal organic vapor-phase epitaxial method, and the method further comprises the step (c) of growing a second nitride semiconductor portion on the first nitride semiconductor portion grown in the step (b) by a halide vapor-phase epitaxial growth method.

96. A method according to claim 95, wherein said first selective growth mask is made up of a plurality of individual stripes spaced apart from each other, defining the first windows therebetween, and extending parallel to each other.

97. A method according to claim 96, wherein a ratio of a width of each of the stripes to a width of each of the first windows is not more than 20.

98. A method according to claim 96, wherein a ratio of a width of each of the stripes to a width of each of the first windows is not more than 10.

99. A method according to claim 96, wherein a width of each of the first windows is not more than 8 μ

m and not less than 0.1 μ

m.

100. A method according to claim 96, wherein a width of each of the first windows is not more than 5 μ

m and not less than 0.1 μ

m.

101. A method according to claim 96, wherein each of the stripes has a thickness of 0.01 to 5 μ

m.

102. A method according to claim 96, wherein the dissimilar substrate is a sapphire substrate having a major surface forming a (0001) plane, and the respective stripes extend in a direction perpendicular to a (11{overscore (2)}0) plane of sapphire.

103. A method according to claim 102, wherein the dissimilar substrate has an off-angled major surface.

104. A method according to claim 103, wherein the dissimilar substrate has a major surface off-angled stepwise.

105. A method according to claim 96, wherein the dissimilar substrate is a sapphire substrate having a major surface forming a (11{overscore (2)}0) plane, and the respective stripes extend in a direction perpendicular to the (1{overscore (1)}20) plane of sapphire.

106. A method according to claim 105, wherein the dissimilar substrate has an off-angled major surface.

107. A method according to claim 106, wherein the dissimilar substrate has a major surface off-angled stepwise.

108. A method according to claim 96, wherein the dissimilar substrate is a spinnel substrate having a major surface forming a (111) plane, and the respective stripes extend in a direction perpendicular to the (110) plane of spinnel.

109. A method according to claim 95, wherein the step (b) and/or the step (c) further comprises doping the nitride semiconductor portion with an n-type impurity during growth of the first nitride semiconductor portion.

110. A method according to claim 109, wherein the n-type impurity is added such that a doping concentration decreases with an increase in distance from the dissimilar substrate.

111. A method according to any one of claims 95 to 110, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 2,000.

112. A method according to claim 111, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 1,800.

113. A method according to claim 111, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 1,500.

114. A method according to claim 111, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not less than 10.

115. A method according to claim 111, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not less than 30.

116. A method according to claim 111, wherein growth of the nitride semiconductor portion is performed under a reduced pressure of 50 to 400 Torr.

117. A nitride semiconductor growth method according to claim 72, further comprising:

the step (c) of forming a second selective growth mask on the first nitride semiconductor portion grown in the step (b), said second selective growth mask having a plurality of second windows selectively exposing upper surfaces of the first nitride semiconductor portions; and

the step (d) of growing second nitride semiconductor portions from the upper surfaces, of the first nitride semiconductor portion, which are exposed from the second windows, by using a gaseous Group 3 element source and a gaseous nitrogen source, until the second nitride semiconductor portions grown in the adjacent windows combine with each other on an upper surface of said second selective growth mask.

118. A method according to claim 117, wherein a total area of upper surfaces of portions, of the first nitride semiconductor portions, which are covered with said second selective growth mask is larger than that of portions, of the first nitride semiconductor portions, which are exposed from the second windows.

119. A method according to claim 118, wherein said first and selective growth mask are made up of a plurality of individual stripes spaced apart from each other, defining the first windows therebetween, and extending parallel to each other.

120. A method according to claim 119, wherein a ratio of a width of each of the stripes to a width of each of the windows is not more than 20.

121. A method according to claim 119, wherein a ratio of a width of each of the stripes to a width of each of the windows is not more than 10.

122. A method according to claim 120, wherein a width of each of the windows is not more than 8 μ

m and not less than 0.1 μ

m.

123. A method according to claim 120, wherein a width of each of the windows is not more than 5 μ

m and not less than 0.1 μ

m.

124. A method according to claim 119, wherein each of the stripes has a thickness of 0.01 to 5 μ

m.

125. A method according to claim 119, wherein the dissimilar substrate is a sapphire substrate having a major surface forming a (0001) plane, and the respective stripes extend in a direction perpendicular to a (11{overscore (2)}0) plane of sapphire.

126. A method according to claim 125, wherein the dissimilar substrate has an off-angled major surface.

127. A method according to claim 126, wherein the dissimilar substrate has a major surface off-angled stepwise.

128. A method according to claim 119, wherein the dissimilar substrate is a sapphire substrate having a major surface forming a (11{overscore (2)}0) plane, and the respective stripes extend in a direction perpendicular to the (1{overscore (1)}20) plane of sapphire.

129. A method according to claim 128, wherein the dissimilar substrate has an off-angled major surface.

130. A method according to claim 128, wherein the dissimilar substrate has a major surface off-angled stepwise.

131. A method according to claim 119, wherein the dissimilar substrate is a spinnel substrate having a major surface forming a (111) plane, and the respective stripes extend in a direction perpendicular to the (110) plane of spinnel.

132. A method according to claim 117, wherein the step (b) and/or the step (d) further comprises doping the nitride semiconductor portion with an n-type impurity during growth of the first nitride semiconductor portion.

133. A method according to claim 132, wherein the n-type impurity is added such that a doping concentration decreases with an increase in distance from the dissimilar substrate.

134. A method according to any one of claims 117 to 133, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 2,000 in the step (b) and/or the step (d).

135. A method according to claim 134, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 1,800.

136. A method according to claim 134, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 1,500.

137. A method according to claim 134, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not less than 10.

138. A method according to claim 134, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not less than 30.

139. A method according to claim 134, wherein growth of the nitride semiconductor portion in the step (b) and/or the step (d) is performed by a metal organic vapor-phase epitaxial method.

140. A method according to claim 139, wherein growth of the nitride semiconductor portion in the step (b) and/or the step (d) is performed under a reduced pressure of 50 to 400 Torr.

142. A method according to claim 141, wherein the recess portions are formed by a plurality of individual grooves spaced apart from each other and extending parallel.

143. A method according to claim 142, wherein the plurality of individual grooves have a plurality of individual walls formed therebetween, and said first growth control mask is made up of individual stripes formed on top surfaces of the respective individual walls.

144. A method according to claim 143, wherein a total surface area of said first growth control mask is larger than that of bottom surfaces of the grooves.

145. A method according to claim 144, wherein a ratio of a width of each of the individual stripes to a width of each of the grooves is more than 1 and not more than 20.

146. A method according to claim 145, wherein a ratio of a width of each of the individual stripes to a width of each of the grooves is more than 1 and not more than 10.

147. A method according to claim 146, wherein each of the grooves has a depth of 500 angstroms to 5 μ

m.

148. A method according to claim 143, wherein the dissimilar substrate is a sapphire substrate having a major surface forming a (0001) plane, and the respective individual stripes extend in a direction perpendicular to a (11{overscore (2)}0) plane of sapphire.

149. A method according to claim 143, wherein the dissimilar substrate is a sapphire substrate having a major surface forming a (11{overscore (2)}0) plane, and the respective individual stripes extend in a direction perpendicular to the (1{overscore (1)}20) plane of sapphire.

150. A method according to claim 143, wherein the dissimilar substrate is a spinnel substrate having a major surface forming a (111) plane, and the respective stripes extend in a direction perpendicular to the (110) plane of spinnel.

151. A method according to claim 141, wherein the step (d) further comprises doping the nitride semiconductor portion with an n-type impurity during growth of the first nitride semiconductor portion.

152. A method according to claim 151, wherein the n-type impurity is added such that a doping concentration decreases with an increase in distance from the dissimilar substrate.

154. A method according to claim 153, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 1,800.

155. A method according to claim 153, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 1,500.

156. A method according to claim 153, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not less than 10.

157. A method according to claim 156, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not less than 30.

158. A method according to claim 153, wherein growth of the nitride semiconductor portion in the step (d) is performed by a metal organic vapor-phase epitaxial method.

159. A method according to claim 158, wherein growth of the nitride semiconductor portion is performed under a reduced pressure of 50 to 400 Torr.

160. A method according to claim 141, wherein the step (c) further comprises forming a second growth control mask on the bottom surfaces of the recess portions to selectively expose the nitride semiconductor layer from side surfaces of the recess portions.

161. A method according to claim 160, wherein the recess portions are formed by a plurality of individual grooves spaced apart from each other and extending parallel.

162. A method according to claim 161, wherein the plurality of individual grooves have a plurality of individual walls formed therebetween, and said first growth control mask is made up of individual stripes formed on top surfaces of the respective individual walls.

163. A method according to claim 162, wherein a portion of the nitride semiconductor layer that is exposed from a side surface of the recess portion has a thickness of not less than 100 angstroms.

164. A method according to claim 162, wherein a portion of the nitride semiconductor layer that is exposed from a side surface of the recess portion has a thickness of 1 to 10 μ

m.

165. A method according to claim 162, wherein the dissimilar substrate is a sapphire substrate having a major surface forming a (0001) plane, and the respective individual stripes extend in a direction perpendicular to a (11{overscore (2)}0) plane of sapphire.

166. A method according to claim 162, wherein the dissimilar substrate is a sapphire substrate having a major surface forming a (11{overscore (2)}0) plane, and the respective individual stripes extend in a direction perpendicular to the (1{overscore (1)}20) plane of sapphire.

167. A method according to claim 162, wherein the dissimilar substrate is a spinnel substrate having a major surface forming a (111) plane, and the respective stripes extend in a direction perpendicular to the (110) plane of spinnel.

168. A method according to claim 160, wherein the step (d) further comprises doping the nitride semiconductor portion with an n-type impurity during growth of the first nitride semiconductor portion.

169. A method according to claim 168, wherein the n-type impurity is added such that a doping concentration decreases with an increase in distance from the dissimilar substrate.

170. A method according to any one of claims 160 to 169, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 2,000.

171. A method according to claim 170, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 1,800.

172. A method according to claim 170, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 1,500.

173. A method according to claim 170, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not less than 10.

174. A method according to claim 170, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not less than 30.

175. A method according to claim 170, wherein g rowth of the nitride semiconductor portion in the step (d) is performed by a metal organic vapor-phase epitaxial method.

176. A method according to claim 173, wherein growth of the nitride semiconductor portion is performed under a reduced pressure of 50 to 400 Torr.

178. A substrate according to claim 177, wherein first regions, each having a relatively small number of crystal defects, and second regions, each having a relatively large number of crystal defects, are unevenly distributed in the first major surface.

179. A substrate according to claim 177, wherein said substrate has a thickness of not less than 70 μ

m.

181. A nitride semiconductor substrate according to claim 180, wherein said substrate is doped with an n-type impurity.

182. A nitride semiconductor substrate according to claim 181, wherein the n-type impurity has a concentration gradient in said substrate.

183. A substrate according to claim 180, wherein said substrate is grown by a halide vapor-phase epitaxial growth method.

185. A device according to claim 184, wherein said nitride semiconductor substrate is supported on a dissimilar substrate made of a material different from a nitride semiconductor.

141. A nitride semiconductor growth method comprising the steps of:

(a) forming a nitride semiconductor layer on a support member including a dissimilar substrate made of a material different from a nitride semiconductor and having a major surface;

(b) forming a plurality of recess portions having bottom surfaces substantially parallel to an upper surface of the support member in said nitride semiconductor layer;

(c) selectively forming a first growth control mask on a top surface of the nitride semiconductor layer to selectively expose the nitride semiconductor layer from side surfaces of the recess portions; and

(d) growing a nitride semiconductor from an exposed surface of the nitride semiconductor layer by using a gaseous Group 3 element source and a gaseous nitrogen source.

153. A method according to any one of claims 141 to 152, wherein the gaseous nitrogen source and the gaseous Group 3 element source are supplied at a molar ratio of not more than 2,000.

177. A nitride semiconductor substrate comprising a nitride semiconductor crystal and having first and second major surfaces, wherein a region near the first major surface has a relatively small number of crystal defects, and a region near the second major surface has a relatively large number of crystal defects.

184. A nitride semiconductor device comprising a nitride semiconductor device structure supported on said nitride semiconductor substrate defined in any one of claims 177 to 183.

180. A nitride semiconductor substrate comprising a nitride semiconductor crystal and having first and second major surfaces, characterized by the number of crystal defects in a surface region in the first major surface being not more than 1×

10⁵/cm².

186. A nitride semiconductor growth method characterized by comprising the steps of forming a nitride semiconductor on a support member including a dissimilar substrate, using said nitride semiconductor as a seed crystal to grow a new nitride semiconductor in substantially only a lateral direction while suppressing growth of the nitride semiconductor in a vertical direction, and then growing the nitride semiconductor in both the vertical and lateral directions, thereby obtaining an integral nitride semiconductor crystal on a substantially entire upper surface of the support member.