METHOD AND SYSTEM FOR CONTROLLING DATA IN A COMPUTER SYSTEM

• US 20020049917A1
• Filed: 09/21/1999
• Published: 04/25/2002
• Est. Priority Date: 09/21/1999
• Status: Active Grant

• Current Assignee: BiTMICRO, LLC (BiTMICRO Networks, Inc.)
• Original Assignee: BiTMICRO Networks, Inc.
• Inventors: BRUCE, RICARDO H., PORTMAN, ROLAND F.
• Granted Patent: US 6,496,939 B2
• Time in Patent Office: Days
• US Class Current: 713/300
• CPC Class Codes: G06F 1/30 Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations for resetting only G06F1/24

Abstract

The present invention discloses a method and system for controlling data in a computer system when the computer system loses power, the computer system comprising a computing engine. The method and system comprises activating a plurality of super capacitors to supply power to the computing engine based upon power being removed from the computer system and reconfiguring the data in the computing engine. Through the use of a system and method in accordance with the present invention, a user is able to correctly store large amounts of newly written and modified data from the volatile memory to the non-volatile memory in the event of a sudden external system power loss. Furthermore, the user of a system and method in accordance with the present invention will be able to rapidly and irretrievably erase data from the non-volatile memory automatically, in the event of a sudden loss of external power or manually. This capability consumes minimal space and weight and is implemented in an affordable manner.

Claims

1. A method for controlling data in a computer system when the computer system loses power, the computer system comprising a computing engine, comprising the steps of:

(a) activating a plurality of super capacitors to supply power to the computing engine based upon power being removed from the computer system; and

(b) reconfiguring the data in the computing engine.

2. The method of claim 1 wherein the computing engine comprises a least one volatile memory and at least one non-volatile memory.

3. The method of claim 2 wherein the reconfiguring step (b) further comprises:

(b1) allowing all data to be transferred from the at least one volatile memory to the at least one non-volatile memory.

4. The method of claim 2 wherein the reconfiguring step (b) further comprises:

(b1) allowing all data in the at least one volatile memory to be erased.

5. The method of claim 4 wherein the reconfiguring step (b) further comprises:

(b2) allowing all data in the at least one non-volatile memory to be erased.

6. The method of claim 3 wherein the activating step (a) further comprises:

(a1) reversing the flow of current between the computing engine and the plurality of super capacitors; and

(a2) discharging current from the plurality of super capacitors to the computing engine.

7. The method of claim 4 wherein the activating step (a) further comprises:

(a1) reversing the flow of current between the computing engine and the plurality of super capacitors; and

(a2) discharging current from the plurality of super capacitors to the computing engine.

8. The method of claim 5 wherein the allowing step (b2) is initiated based upon a user interaction.

9. The method of claim 8 wherein the user interaction is the depressing of a button.

10. A system for controlling data in a computer system when the computer system loses power, the computer system comprising a computing engine, comprising:

means for activating a plurality of super capacitors to supply power to the computing engine based upon power being removed from the computer system; and

means for reconfiguring the data in the computing engine.

11. The system of claim 10 wherein the computing engine comprises a least one volatile memory and at least one non-volatile memory.

12. The system of claim 11 wherein the reconfiguring means further comprises:

means for allowing all data to be transferred from the at least one volatile memory to the at least one non-volatile memory.

13. The system of claim 11 wherein the reconfiguring means further comprises:

means for allowing all data in the at least one volatile memory to be erased.

14. The system of claim 13 wherein the allowing means further comprises:

means for allowing all data in the at least one non-volatile memory to be erased.

15. The system of claim 12 wherein the activating means further comprises:

means for reversing the flow of current between the computing engine and the plurality of super capacitors; and

means for discharging current from the plurality of super capacitors to the computing engine.

16. The system of claim 13 wherein the activating means further comprises:

means for reversing the flow of current between the computing engine and the plurality of super capacitors; and

means for discharging current from the plurality of super capacitors to the computing engine.

17. The system of claim 14 wherein the allowing means is initiated based upon a user interaction.

18. The system of claim 17 wherein the user interaction is the depressing of a button.