Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein

• US 20020051382A1
• Filed: 11/16/2001
• Published: 05/02/2002
• Est. Priority Date: 03/17/1992
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Hitachi ULSI Systems Company Limited (Hitachi, Ltd.)
• Inventors: Kuroda, Kenichi, Ito, Takashi, Shiba, Kazuyoshi, Yashiki, Naoki, Terasawa, Masaaki, Mukai, Hirofumi, Sato, Masanao, Matsubara, Kiyoshi, Baba, Shiro
• Granted Patent: US 6,493,271 B2
• Time in Patent Office: Days
• US Class Current: 365/185.08
• CPC Class Codes: G06F 15/7814 Specially adapted for real time processing, e.g. comprising hardware timers
• CPC Class Codes: G06F 15/7821 Tightly coupled to memory, e.g. computational memory, smart memory, processor in memory
• CPC Class Codes: G06F 9/445 Program loading or initiating bootstrapping G06F9/4401; security arrangements for program loading or initiating G06F21/57
• CPC Class Codes: G11C 16/0416 comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
• CPC Class Codes: G11C 16/102 External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
• CPC Class Codes: G11C 16/105 Circuits or methods for updating contents of nonvolatile memory, especially with 'security' features to ensure reliable replacement, i.e. preventing that old data is lost before new data is reliably written
• CPC Class Codes: G11C 16/12 Programming voltage switching circuits
• CPC Class Codes: G11C 16/16 for erasing blocks, e.g. arrays, words, groups
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/30 Power supply circuits
• CPC Class Codes: G11C 16/3418 Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 16/3427 Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
• CPC Class Codes: G11C 16/3445 Circuits or methods to verify correct erasure of nonvolatile memory cells
• CPC Class Codes: G11C 16/3459 Circuits or methods to verify correct programming of nonvolatile memory cells
• CPC Class Codes: G11C 7/1045 Read-write mode select circuits
• CPC Class Codes: H10B 41/40 characterised by the peripheral circuit region
• CPC Class Codes: H10B 41/42 Simultaneous manufacture of periphery and memory cells
• CPC Class Codes: H10B 41/49 comprising different types of peripheral transistor
• CPC Class Codes: H10B 69/00 Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A semiconductor device having and electrically erasable and programmable nonvolatile memory, for example, a rewritable nonvolatile memory including memory cells arranged in rows and columns and disposed to facilitate both flash erasure as well as selective erasure of individual units of plural memory cells. The semiconductor device which functions as a microcomputer chip also has a processing unit and includes an input terminal for receiving an operation mode signal for switching the microcomputer between a first operation mode in which the flash memory is rewritten under control of a processing unit and a second operation mode in which the flash memory is rewritten under control of separate writing circuit externally connectable to the microcomputer.

Claims

1. A method for manufacturing a printed board on which a semiconductor device is mounted, the method comprising:

preparing a resin sealed semiconductor device which includes a semiconductor substrate on which a CPU and a flash memory are formed, wherein the semiconductor device has

(i) a first mode for writing data supplied from outside of the semiconductor substrate into the flash memory by a PROM writer, and

(ii) a second mode for writing data supplied from outside of the semiconductor substrate into the flash memory by executing a write control program with the CPU;

in the first mode, writing a program into the flash memory by inputting data in parallel to the semiconductor device from the PROM writer; and

, subsequently,

mounting the semiconductor device on the printed board.

2. A method according to claim 1, wherein the writing includes:

erasing of data from the flash memory;

writing of data into the flash memory; and

verifying results of operation of the flash memory.

3. A method according to claim 1,

wherein the resin sealed semiconductor device includes a flat package having external terminals in four directions.

4. A method according to claim 3,

wherein the distance between adjacent external terminals is 0.5 mm or less.

5. A method according to claim 1, further comprising:

after the mounting of the semiconductor device, in the second mode, performing a rewriting of the flash memory with externally inputted data.

6. A method according to claim 5,

wherein the flash memory has a plurality of memory blocks, each block being defined as a simultaneously erasable unit, and

wherein ones of the plurality of memory blocks are rewritten in the second mode.

7. A method for manufacturing a printed board on which a semiconductor device is mounted, the method comprising:

preparing a resin sealed semiconductor device which includes a semiconductor substrate on which a CPU, a serial communication interface and a flash memory are formed, wherein the semiconductor device has

(i) a first mode for writing data supplied from outside of the semiconductor substrate into the flash memory by a PROM writer, and

(ii) a second mode for writing data supplied from outside of the semiconductor substrate into the flash memory by executing a write control program with the CPU;

mounting the semiconductor device on the printed board; and

after the mounting of the semiconductor device, in the second mode, performing a rewriting of the flash memory with externally inputted data via the serial communication interface.

8. A method according to claim 7, wherein the writing includes:

erasing of data from the flash memory;

writing of data into the flash memory; and

verifying results of operation of the flash memory.

9. A method according to claim 7,

wherein the resin sealed semiconductor device includes a flat package having external terminals in four directions.

10. A method according to claim 9,

wherein the distance between adjacent external terminals is 0.5 mm or less.

11. A method according to claim 7, further comprising:

before the mounting of the semiconductor device, in the first mode, writing a program into the flash memory by inputting data in parallel to the semiconductor device from the PROM writer.

12. A method according to claim 7,

wherein the flash memory has a plurality of memory blocks, each block being defined as a simultaneously erasable unit, and

wherein ones of the plurality of memory blocks are rewritten in the second mode.

14. A method according to claim 13,

wherein the writing or the rewriting includes:

erasing of data from the flash memory;

writing of data into the flash memory; and

verifying results of operation of the flash memory.

15. A method according to claim 13,

wherein the resin sealed semiconductor device includes a flat package having external terminals in four directions.

16. A method according to claim 15,

wherein the distance between adjacent external terminals is 0.5 mm or less.

17. A method according to claim 13,

wherein the flash memory has a plurality of memory blocks, each block being defined as a simultaneously erasable unit, and

wherein ones of the plurality of memory blocks are rewritten in the second mode.

19. A method according to claim 18, wherein the rewriting includes:

erasing of data from the flash memory;

writing of data into the flash memory; and

verifying results of operation of the flash memory.

20. A method according to claim 18,

wherein the resin sealed semiconductor device includes a flat package having external terminals in four directions.

21. A method according to claim 20,

wherein the distance between adjacent external terminals is 0.5 mm or less.

22. A method according to claim 18, further comprising:

before the mounting of the semiconductor device, in the first mode, writing a program into the flash memory by inputting data in parallel to the semiconductor device from the PROM writer.

23. A method according to claim 18,

wherein the flash memory has a plurality of memory blocks, each block being defined as a simultaneously erasable unit, and

wherein the data stored in ones of the plurality of memory blocks is rewritten in the second mode.

13. A method for manufacturing a printed board on which a semiconductor device is mounted, the method comprising:

preparing a resin sealed semiconductor device which includes a semiconductor substrate on which a CPU, an I/O port and a flash memory are formed, wherein the semiconductor device has

(i) a first mode for writing data supplied from outside of the semiconductor substrate into the flash memory by a PROM writer, and

(ii) a second mode for writing data supplied from outside of the semiconductor substrate into the flash memory by executing a write control program with the CPU;

in the first mode, writing the control program to the flash memory by the PROM writer;

mounting the semiconductor device on the printed board; and

after the mounting of the semiconductor device, in the second mode, performing a rewriting of the flash memory with externally inputted data via the I/O port.

18. A method for manufacturing a printed board on which a semiconductor device is mounted, the method comprising:

preparing a resin sealed semiconductor device which includes a semiconductor substrate on which a CPU, an I/O port and a flash memory are formed, wherein the semiconductor device has

(i) a first mode for writing data supplied from outside of the semiconductor substrate into the flash memory by a PROM writer, and

(ii) a second mode for writing data supplied from outside of the semiconductor substrate into the flash memory by executing a write control program with the CPU;

mounting the semiconductor device on the printed board; and

after the mounting of the semiconductor device, in the second mode, performing a rewriting of the flash memory with externally inputted data via the I/O port.