Minimally- patterned, thin-film semiconductor devices for display applications
First Claim
Patent Images
1. A thin-film transistor array comprising at least first and second transistors, each of the first and second transistors comprising:
- a shared silicon layer having a thickness less than 40 nm and extending continuously between the first and second transistors;
a source electrode in direct contact with the silicon layer;
a drain electrode spaced from the source electrode and in direct contact with the silicon layer; and
a gate electrode disposed adjacent to the silicon layer.
2 Assignments
0 Petitions
Accused Products
Abstract
A thin-film transistor array comprises at least first and second transistors. Each of the first and second transistors include a shared silicon layer, i.e., an active layer, having a thickness less than approximately 40 nm. The shared silicon layer extends continuously between the first and second transistors. The silicon layer may consist of unpatterned silicon. Heavily doped material may not be required at metal-silicon contact interfaces.
-
Citations
30 Claims
-
1. A thin-film transistor array comprising at least first and second transistors, each of the first and second transistors comprising:
-
a shared silicon layer having a thickness less than 40 nm and extending continuously between the first and second transistors;
a source electrode in direct contact with the silicon layer;
a drain electrode spaced from the source electrode and in direct contact with the silicon layer; and
a gate electrode disposed adjacent to the silicon layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
-
-
11. An electronic display comprising:
-
a display medium;
a first pixel electrode and a second pixel electrode provided adjacent to the display medium; and
a first thin-film transistor and a second thin-film transistor in respective electrical communication with the first pixel electrode and the second pixel electrode, and comprising a shared continuous amorphous silicon layer that has a thickness less than 40 nm and provides channels for the first thin-film transistor and the second thin-film transistor. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30)
-
-
19. A method of manufacturing an array of thin-film transistors comprising at least a first transistor and a second transistor, the method comprising the steps of:
- providing a substrate;
forming adjacent to the substrate an unpatterned silicon layer having a thickness less than 40 nm;
forming at least one patterned drain electrode for each of the transistors, the drain electrodes in direct contact with the unpatterned silicon layer;
forming at least one patterned source electrode for each of the transistors, the source electrodes in direct contact with the unpatterned silicon layer; and
forming at least one gate electrode for each of the transistors, the gate electrode disposed adjacent to the unpatterned silicon layer.
- providing a substrate;
Specification