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Method and apparatus of determining defect-free semiconductor integrated circuit

  • US 20020060584A1
  • Filed: 09/28/2001
  • Published: 05/23/2002
  • Est. Priority Date: 10/02/2000
  • Status: Active Grant
First Claim
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1. A method of determining a defect-free or defect semiconductor integrated circuit, comprising:

  • a first measurement step for measuring a quiescent power supply current (QPSC) of a first semiconductor integrated circuit (IC), a plurality of times in a predetermined interval after stop of the operation of the first IC;

    a first data calculation step for calculating a first feature data indicating a feature(s) of the measured QPSCs of the first IC;

    a second measurement step for measuring a QPSC of a second semiconductor IC, a plurality of times in the same condition to that of the first IC after stop of the operation of the second IC;

    a second data calculation step for calculating a second feature data indicating a feature(s) of the measured QPSCs of the second IC; and

    a comparison and determination step for comparing a resemble between the first feature data and the second feature data, and determining the first and second ICs as defect-free ICs when the resemble is high or the first and second ICs as defect ICs when the resemble is low.

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