Solid-state imaging device

• US 20020063302A1
• Filed: 11/30/2001
• Published: 05/30/2002
• Est. Priority Date: 11/30/2000
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: NEC Corporation
• Inventors: Ohkubo, Hiroaki, Nakashiba, Yasutaka, Furumiya, Masayuki
• Granted Patent: US 6,639,293 B2
• Time in Patent Office: Days
• US Class Current: 257/432
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 31/0352 characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions

Abstract

A solid-state imaging device such as a CMOS image sensor includes photodiode portions that are designed for both improving sensitivity and reducing crosstalk of electrical charge to adjacent pixels. A p-type layer, which has an impurity concentration that is lower than that of a substrate p⁺-layer, is formed on the substrate p⁺-layer which is a p-type silicon semiconductor substrate of high impurity concentration. An n-type photoelectric conversion region is provided at a position on the upper side of the p-type layer. By means of this configuration, of the photoelectrons that are generated in the p-type layer, electrons that diffuse in the direction of the substrate are reliably captured in substrate p⁺-layer and annihilated by recombination.

Claims

1. A solid-state imaging device, comprising:

a substrate layer which is composed of a semiconductor of a first conductive type;

a semiconductor layer of said first conductive type which is provided on said substrate layer; and

a photoelectric conversion region of a second conductive type, which is an opposite conductive type of said first conductive type, provided on said semiconductor layer;

wherein impurity concentration of said substrate layer is higher than impurity concentration of said semiconductor layer.

2. A solid-state imaging device according to claim 1, further comprising a peripheral circuit semiconductor layer of the first conductive type which is formed on said semiconductor layer at least below transistors in pixels, impurity concentration of the peripheral circuit semiconductor layer being higher than the impurity concentration of said semiconductor layer.

3. A solid-state imaging device according to claim 1, wherein a depth profile of impurity in said semiconductor layer is a retrograde profile.

4. A solid-state imaging device according to claim 1, wherein distance from a surface of a semiconductor main plane to a surface on the substrate layer side of said semiconductor layer is a minimum of 2 μ

m and a maximum of 10 μ

m.

5. A solid-state imaging device, comprising:

a substrate layer which is composed of a semiconductor of a first conductive type;

a low-impurity concentration semiconductor layer of said first conductive type which is provided on said substrate layer;

a semiconductor layer of said first conductive type which is provided on said low-impurity concentration semiconductor layer; and

a photoelectric conversion region of a second conductive type, which is an opposite conductive type of said first conductive type, provided on said semiconductor layer;

wherein impurity concentration of said substrate layer is higher than impurity concentration of said semiconductor layer, and impurity concentration of said low-impurity density semiconductor layer is lower than the impurity concentration of said semiconductor layer.

6. A solid-state imaging device according to claim 5, wherein the impurity concentration of said low-impurity density semiconductor layer is lower than impurity concentration of said photoelectric conversion region.

7. A solid-state imaging device according to claim 5, wherein at least one of said semiconductor layer and said low-impurity density semiconductor layer is formed by epitaxial growth.

8. A solid-state imaging device according to claim 5, further comprising a peripheral circuit semiconductor layer of the first conductive type that is formed on said semiconductor layer at least below transistors in pixels, impurity concentration of the peripheral circuit semiconductor layer being higher than the impurity concentration of said semiconductor layer.

9. A solid-state imaging device according to claim 5, wherein a depth profile of impurity in said semiconductor layer is a retrograde profile.

10. A solid-state imaging device according to claim 5, wherein distance from a surface of a semiconductor main plane to a surface on the substrate layer side of said semiconductor layer is a minimum of 2 μ

m and a maximum of 10 μ

m.