Method of manufacturing a contact of a semiconductor device using cluster apparatus having at least one plasma pretreatment module

• US 20020064944A1
• Filed: 10/25/2001
• Published: 05/30/2002
• Est. Priority Date: 11/24/2000
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kim, Ji-soo, Chi, Kyeong-koo, Chu, Chang-woong, Seo, Sang-hun, Chung, Seung-pil
• Granted Patent: US 6,767,834 B2
• Time in Patent Office: Days
• US Class Current: 438/637
• CPC Class Codes: H01L 21/02063 the processing being the formation of vias or contact holes
• CPC Class Codes: H01L 21/31138 by dry-etching
• CPC Class Codes: H01L 21/76802 by forming openings in dielectrics
• CPC Class Codes: H01L 21/76814 post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
• CPC Class Codes: H01L 21/76897 Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step self-aligned silicidation on field effect transistors H01L29/665

Abstract

A method of manufacturing a contact of a semiconductor device includes a series of pretreatment processes each performed in a plasma pretreatment module. A semiconductor substrate has an interlayer formed on an underlayer of a material containing silicon. A contact hole is formed in the interlayer to expose a surface of the underlayer. Subsequently, the semiconductor substrate is loaded into a plasma pretreatment module. The photoresist pattern is removed by ashing in the plasma pretreatment module. A damaged layer at the surface exposed by the contact hole is then removed in the plasma pretreatment module. Subsequently, the semiconductor substrate is pre-cleaned in the plasma pretreatment module. The semiconductor substrate is then transferred, while in a vacuum, to a deposition module. There, an upper layer is formed on the substrate to fill the contact hole. SEC.877

Claims

1. A method of manufacturing a contact of a semiconductor device, comprising the steps of:

providing a semiconductor substrate on which an interlayer is formed on an underlayer comprising silicon;

forming a contact hole in the interlayer using a photoresist pattern as an etching mask, wherein a surface of the underlayer is exposed at the bottom of the contact hole;

loading the semiconductor substrate into apparatus having a plasma pretreatment module and a deposition module connected to each other;

transferring the semiconductor substrate to the plasma pretreatment module;

ashing the photoresist pattern, in the plasma pretreatment module, to remove the photoresist pattern;

subsequently removing a damaged layer at the surface of the underlayer that defines the bottom of the contact hole, in the plasma pretreatment module;

subsequently cleaning the semiconductor substrate, in the plasma pretreatment module;

subsequently transferring the semiconductor substrate, while in a vacuum, to the deposition module; and

depositing material onto the substrate that fills the contact hole, in the deposition module.

2. The method of claim 1, wherein said ashing, removing of the damaged layer, and pre-cleaning each comprise exciting gas outside of the pre-treatment module using microwaves to induce a plasma state, and directing the gas in the plasma state towards the substrate within the pretreatment module.

3. The method of claim 2, wherein said ashing comprises heating the substrate, in the pretreatment module.

4. The method of claim 3, wherein said heating comprises generating ultraviolet (UV) light within the pretreatment module.

5. The method of claim 4, wherein said ashing comprises exciting nitrogen gas and oxygen outside of the pre-treatment module using microwaves to induce the plasma state, and supplying the nitrogen gas and oxygen gas in a plasma state towards the substrate within the pretreatment module.

6. The method of claim 5, wherein said ashing comprises supplying the nitrogen gas at a rate of 10-2,000 sccm and the oxygen gas at a rate of 10-2,000 sccm as reaction gases, exciting the gases with a microwave power of 500-2,000 W, maintaining a pressure of 0.1-10 Torr within the plasma pretreatment module, regulating the temperature of the substrate to 25-300°

C., and operating a UV lamp at 300-1,000 W of power to supply the UV light.

7. The method of claim 1, wherein said removing of the damaged layer comprises exciting nitrogen gas and oxygen outside of the pre-treatment module using microwaves to induce the plasma state, and supplying the nitrogen gas and oxygen gas in the plasma state and a fluorine-based gas towards the substrate within the pretreatment module.

8. The method of claim 7, wherein the fluorine-based gas is NF₃.

9. The method of claim 8, wherein said removing of the damaged layer comprises supplying the nitrogen gas at a rate of 10-2,000 sccm, the oxygen gas at a rate of 10-2,000 sccm, and the NF₃ gas at a rate of 30-300 sccm as reaction gases, exciting the nitrogen gas and the oxygen gas with a microwave power of 500-2,000 W, maintaining a pressure of 0.1-10 Torr within the plasma pretreatment module, and regulating the temperature of the semiconductor substrate to 5-300°

C.

10. The method of claim 1, wherein said cleaning comprises:

supplying hydrogen gas in a plasma state and a fluorine-based gas onto the substrate to cause a chemical reaction to occur with an oxide layer on the underlayer comprising silicon, thereby forming a reaction layer, and annealing the reaction layer to vaporize the same.

11. The method of claim 10, wherein the fluorine-based gas is supplied in a gaseous state.

12. The method of claim 10, wherein said supplying of the fluorine-based gas comprises exciting fluorine-based gas outside of the pre-treatment module using microwaves to induce a plasma state, and directing the fluorine-based gas in the plasma state onto the substrate.

13. The method of claim 10, wherein the fluorine-based gas is selected from the group consisting of NF₃, SF₆, and ClF₃.

14. The method of claim 10, wherein said cleaning comprises supplying the nitrogen gas at a rate of 10-2,000 sccm, the hydrogen gas at a rate of 5-200 sccm, and the fluorine-based gas at a rate of 10-300 sccm as reaction gases, exciting the gases with a microwave power of 500-2,000 W, maintaining a pressure of 0.1-10 Torr within the plasma pretreatment module, and regulating the temperature of the semiconductor substrate temperature to 0-50°

C.

15. The method of claim 10, wherein said cleaning comprises positioning the semiconductor substrate in a lower portion of the pretreatment module while supplying the gas to cause said chemical reaction, and positioning the substrate in an upper portion of the pretreatment module while the annealing is being carried out.

16. The method of claim of claim 10, wherein said annealing comprises heating the semiconductor substrate to within a range of 100-500°

C.

18. The method of claim 17, wherein said ashing, removing of the damaged layer, and cleaning each comprise exciting gas using microwaves.

19. The method of claim 17, wherein said ashing comprises exciting nitrogen gas and oxygen using microwaves to induce a plasma state.

20. The method of claim 19, wherein said ashing comprises supplying the nitrogen gas at a rate of 10-2,000 sccm and the oxygen gas at a rate of 10-2,000 sccm as reaction gases, exciting the gases with a microwave power of 500-2,000 W, maintaining a pressure of 0.1-10 Torr within the plasma pretreatment processing chamber in which the ashing process is carried out, regulating the temperature of the substrate to 25-300°

C., and operating a UV lamp having at 300-1,000 W of power to supply the UV light.

21. The method of claim 17, wherein the fluorine-based gas is NF₃.

22. The method of claim 21, wherein said removing of the damaged layer comprises supplying the nitrogen gas at a rate of 10-2,000 sccm, the oxygen gas at a rate of 10-2,000 sccm, and the NF₃ gas at a rate of 30-300 sccm as reaction gases, exciting the nitrogen gas and the oxygen gas with a microwave power of 500-2,000 W, maintaining a pressure of 0.1-10 Torr within the pretreatment processing chamber in which said removing of the damaged layer is carried out, and regulating the temperature of the semiconductor substrate temperature to 5-300°

C.

23. The method of claim 17, wherein said cleaning comprises:

supplying hydrogen gas and nitrogen gas in a plasma state and a fluorine-based gas onto the substrate.

24. The method of claim 23, wherein the fluorine-based gas is supplied in a gaseous state.

25. The method of claim 24, wherein the supplying of the fluorine-based gas comprises exciting fluorine-based gas using microwaves to induce a plasma state.

26. The method of claim 25, wherein the fluorine-based gas is selected from the group consisting of NF₃, SF₆, and ClF₃.

27. The method of claim 23, wherein said cleaning comprises supplying the nitrogen gas at a rate of 10-2,000 sccm, the hydrogen gas at a rate of 5-200 sccm, and the fluorine-based gas at a rate of 10-300 sccm as reaction gases, exciting the gases with a microwave power of 500-2,000 W, maintaining a pressure of 0.1-10 Torr within the pretreatment processing chamber in which the cleaning is carried out, and regulating the temperature of the semiconductor substrate temperature to 0-50°

C.

28. The method of claim 17, wherein said cleaning comprises positioning the semiconductor substrate in a lower portion of the pretreatment processing chamber while causing said chemical reaction to occur, and positioning the substrate in an upper portion of the pretreatment processing chamber while the annealing is being carried out.

29. The method of claim of claim 17, wherein said annealing comprises heating the semiconductor substrate to within a range of 100-500°

C.

17. A method of manufacturing a contact of a semiconductor device, comprising the steps of:

providing a semiconductor substrate on which an interlayer is formed on an underlayer comprising silicon;

forming a contact hole in the interlayer using a photoresist pattern as an etching mask, wherein a surface of the underlayer is exposed at the bottom of the contact hole;

ashing the photoresist pattern using plasma and UV light to remove the photoresist pattern, in a plasma pretreatment processing chamber;

subsequently removing a damaged layer at the surface of the underlayer that defines the bottom of the contact hole, using a plasma and a fluorine-based gas, in a plasma pretreatment processing chamber, whereby an oxide is formed at said surface;

subsequently cleaning the semiconductor substrate to remove said oxide in a plasma pretreatment processing chamber, said cleaning comprising directing a plasma that chemically reacts with the oxide onto the surface to form a reaction layer, and annealing the substrate to vaporize the reaction layer;

subsequently transferring the semiconductor substrate, while in a vacuum, to a deposition apparatus; and

depositing material onto the substrate that fills the contact hole, in the deposition apparatus.